Grepping for cpu_is_mx6 will not find the definitions of this function
because it is hidden behind a macro. Add a comment containing all
functions defined here to make it greppable.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

We need to distinguish between the i.MX6d/q and the i.MX6d/q plus SoC
variants. Add a cpu type for them to make that possible in the next
steps.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

The i.MX6sl has another silicon revision register offset than the
other i.MX6 SoCs. Finding the register is done twice. Factor out
a function to get a common place to find the register.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Having the i.MX6 type detection completely inline is less then optimal
in terms of binary size. Make the detection functions non-inline. While
at it ask the registers only once and store the result in a variable as
the i.MX6 type is unlikely to change during runtime.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

i.MX6QP revision 2.1 currently are not recognized, causing
imx_set_silicon_revision to print IMX_CHIP_REV_UNKNOWN as 15.15:

  detected i.MX6 Quad Plus revision 15.15

To fix this, instead of extending the list with yet another variant,
switch to the method introduced in the Linux kernel in commit
c22dee6e3c16 ("ARM: imx: Improve the soc revision calculation flow").

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

This patch adds new silicon revision number 1.6 as specified in document
IMX6DQCEC.pdf.

Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

One of the Freescale recommended sequences for power off with external
PMIC is the following:
...
3.  SoC is programming PMIC for power off when standby is asserted.
4.  In CCM STOP mode, Standby is asserted, PMIC gates SoC supplies.

See:
http://www.nxp.com/assets/documents/data/en/reference-manuals/IMX6DQRM.pdf
page 5083

This patch implements step 4. of this sequence.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

The i.MX6 series SoC type is determined by barebox by examining the
USB_ANALOG_DIGPROG aka IMX6_ANATOP_SI_REV register. This register is located
at a common offset for all mx6 SoC - except for i.MX6SL where a different
offset is used. This creates a dilemma while distinguishing the mx6sl from
non-mx6sl SOC since the SoC type identification register location is type
specific itself.

Access to undocumented and probably invalid or unpredictable registers should
be avoided as possible. For the mx6sl detection an access to the general
USB_ANALOG_DIGPROG @0x260 cannot be avoided when running on mx6sl. This
register contained the value 0x00014009 for different mx6sl Rev. 1.2 based
e-book readers using MCIMX6L7DVN10AB and MCIMX6L8DVN10AB SoC. This
implementation assumes the value of MAJOR_UPPER (here 0x01) to be smaller
than the smallest non-6sl MAJOR_UPPER (0x61 for mx6s).

Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Preparational commit to enable the use of cpu_type macros in imx6_cpu_revision()

Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Factor out CPU revision identification code from imx6_init() into a
standalone inline function (similar to imx6_cpu_type()), so that it
would be possible to use that functionality in PBL code.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

The cpu_is_mx6* function for the i.MX6 Solo was missing. All other
functions are already defined.

Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

The current cpu_is_mx6x() functions need the imx6_cpu_type variable
which make them unsuitable for PBL. Add a set of cpu_mx6_is_mx6x()
functions which can be called from PBL aswell. Unlike the cpu_is_mx6x()
functions the cpu_mx6_is_mx6x() functions assume that they are called on
i.MX6 only.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Add some cpu type defines and clock support. The clock support
is very different from other i.MX variants, so it's a separate
file, like done in the kernel.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Using the ANATOP_SI_REV register we can only distinguish between
i.MX6q/d and i.MX6dl/s SoCs. Take the number of cores into account
to get the exact SoC type.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>