The CREDITS file was removed from barebox in 2015 by commit 6570288f2d97
("Remove the CREDITS file"). Remove references to it from several files.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

The attributes should be set to avoid speculative access to memory-mapped
peripherals.

The patch has been tested with:

noinline unsigned long nox(void)
{
	return get_pc();
}

static void xn_test(void)
{
	void *adr = (void *)SOME_SRAM_ADDRESS;
	unsigned long ret;
	unsigned long (*fn)(void) = adr;

	memcpy(adr, nox, 0x1000);

	sync_caches_for_execution();

	ret = fn();
	printf("pc: 0x%08lx\n", ret);
}

Without this patch nox() gets executed in SRAM, with it runs into a
abort as expected.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

The attribute argument to create_sections() is 64bit, so pass in a
64bit variable. This is done in preparation for using some of the upper
bits in the (UN)CACHED_MEM defines.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

For devices that do not have a 1:1 mapping between DMA and CPU we need a
dma_offset. This adds dma_offset to struct device_d and starts honoring
it in ARM dma_(un)map_single(). Also we add some comments to functions
that would normally need a device argument to make the DMA <-> CPU
translations device specific.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

3 level page tables only allow to resolve 39 bit addresses. Switch to 4
level page tables to add support for bigger physical address ranges.
This is needed for example on Layerscape SoCs where the PCI windows are
outside the 39bit range.

The early MMU support still uses 39bit addressing. We only use a single
level page table in early MMU support and with 48bit addresses we
wouldn't have enough granularity to map the SDRAM differently then the
rest of the address space.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

In order to avoid passing random/junky values to DMA/HW as well as to
allow simplifying memory initialization in individual drivers, change
dma_alloc_coherent() to guarantee that memory it returns is properly
zeroed out.

Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Share sanity checking code in mmu_init() as well as code to detect if
MMU is on or not on both ARM and ARM64.

Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Both ARM and ARM64 have identical code for
dma_sync_single_for_cpu(). Move it to mmu-common.c so it can be shared.

Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Both ARM and ARM64 implement almost identical algorithms in
dma_alloc_coherent(). Move the code to mmu-common.c, so it can be
shared.

Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Although there are known problems caused by this, it seems prudent to
invalidate the region of memory we are about remap as
uncached. Additionaliy this matches how dma_alloc_coherent() is
implemented on ARM.

Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Now that AArch64 version is calling arch_remap_range() it is identical
to ARM version in mmu.c. Move the definition to mmu-common.c to avoid
duplication.

Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Since map_region() is never called without being followed by
tlb_invalidate(), merge it with create_sections() to simplify the
code.

Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Instead of calling map_region() explicitly, call arch_regmap_range()
instead to simplify the code. This also ensures that tlb_invalidate()
gets called when dma_free_coherent() is invoked.

Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Both ARM and ARM64 define DMA mapping/unmapping functions that are
exactly the same. Introduce mmu-common.c and move the code there so it
can be shared.

Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Neither ARM nor ARM64 define any address mapping functions that differ
from default provided for no-MMU configuration. Drop all the extra
code and just rely on functions provided in asm/io.h

Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

dma.h provides the prototypes for the different dma_alloc_* functions,
so we should include it to make sure the prototypes are consistent.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Current code for dma_sync_single_for_device(), when called with dir
set to DMA_FROM_DEVICE, will first invalidate given region of memory
as a first step and then clean+invalidate it as a second. While the
second step should be harmless it seems to be an unnecessary no-op
that could probably be avoided.

Analogous code in Linux kernel (4.18) in arch/arm64/mm/cache.S:

ENTRY(__dma_map_area)
	cmp	w2, #DMA_FROM_DEVICE
	b.eq	__dma_inv_area
	b	__dma_clean_area
ENDPIPROC(__dma_map_area)

is written to only perform either invalidate or clean, depending on
the direction, so change dma_sync_single_for_device() to behave in the
same vein and perfom _either_ invlidate or flush of the given region.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Flags passed to arch_remap_range() are architecture independent, so it
can't be passed as is to map_region(). Add code to do the proper
conversion to avoid subtle bugs that this confusion brings.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Make use of create_table() instead of calling xmemalign() and memset()
explicitly.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Until now it was not possible to enable the MMU in PBL because
create_section needs memory allocations which are not available. With
this patch we move the early MMU support to a separate file and all
necessary aux functions to mmu_64.h. create_sections is reimplmented
for the early case to only create 1st level pagetables.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Change the arguements to type unsigned long which is suitable for both
arm32 and arm64. While at it move the prototype to arch/arm/include/.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

cpu/mmu.h has nothing in common for the 32bit and 64bit variant. Make it
two separate files.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Make zero page faulting which allows us to catch NULL pointer derefs.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

For proper DMA support dma_alloc_coherent and DMA sync operations are
needed. Implement them.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Do it as U-Boot: Disable MMU first, then flush caches and finally
invalidate tlbs. I wish I could reference some document instead of
U-Boot code, but I haven't found anything.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

If the MMU is enabled then we should be able to disable it, no
matter if we initialized it in barebox or not. This change is not
really needed but helps when we are starting second stage from U-Boot
with the 'go' command which leaves the MMU enabled.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

When the MMU is disabled there is no need to disable the icache. Leave
it enabled.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>