The CREDITS file was removed from barebox in 2015 by commit 6570288f2d97
("Remove the CREDITS file"). Remove references to it from several files.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

This adds a NAND update handler which automatically detects on the
filetype which stage shall be updated. It takes a single partition
for both the xload images and the barebox images. It uses a fixed
layout on this partition, so there's no need to configure anything
on the board side.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

This adds support for BCH16 ECC encoding. The support is mostly taken
from Linux-5.3-rc6. One major change is the different wrap mode used.
The Kernel uses wrapmode 1, which means "pass all data through the BCH
engine". Still the Kernel has to skip the OOB marker which is done by
reading all user data, then use NAND_CMD_RNDOUT to position right
behind the OOB marker and then read the ECC data. Instead of doing this
we use wrap mode 4 which allows us to bypass the OOB marker from the
BCH engine automatically. This explains

bch_wrapmode = 1, eccsize0 = 0, eccsize1 = 52 vs.
bch_wrapmode = 4, eccsize0 = 4, eccsize1 = 52

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

This removes the stale mach/am33xx-devices.h include as there is no user of it.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

This adds support for the SDRAM controller found on AM3517.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

am33xx_uart_soft_reset() can be used on AM35xx aswell, so move it
to a more generic place where it can be added to am35xx compilation.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Not much to be done here. The AM35xx is very similar to OMAP3.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

- make locally used function static
- include mach/omap4-generic.h to get prototypes

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

This patch is based on a patch from the U-Boot and fixes two errors with
the LCDC. Original commit message from Jyri Sarha [1]:
"Initialize EMIF OCP_CONFIG registers REG_COS_COUNT_1, REG_COS_COUNT_2,
and REG_PR_OLD_COUNT field for Beaglebone-Black and am335x-evm. With
the default values LCDC suffers from DMA FIFO underflows and frame
synchronization lost errors. The initialization values are the highest
that work flawlessly when heavy memory load is generated by CPU. 32bpp
colors were used in the test. On BBB the video mode used 110MHz pixel
clock. The mode supported by the panel of am335x-evm uses 30MHz pixel
clock."

The register values are generated by testing, because there is no formula
to calculate them. Also from Jyri Sarha [1]:
"In practice the only rule to find an optimal value is to find as high as
possible REG_PR_OLD_COUNT value that does not produce LCDC FIFO
underflows under worst case scenario. The worst case happens when the
highest pixel clock videomode with maximum bpp is used while memory
subsystem is stressed by endless stream of writes hitting the same
memory memory bank (can be the same address)."

It only contains the BeagleBone Black and the Phytec SoM, because I
don't have other boards.

[1] https://patchwork.ozlabs.org/patch/704013/

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PRM_RSTTIME register provides settings for global and power domain
reset durations.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Make it possible to write barebox image to multiple partitions
like xload partitions.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Add a support for a redundant barebox backup partition if loading
barebox image from first barebox partitions fails.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

This has no users and seems to be untested. Removed it.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Setup the plls with Master Osc. clock speed from the SYSBOOT
Configuration Pin.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Move the function to read the Master OSC speed from
the SYSBOOT Configuration Pin for reuse.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Silences gcc5 warning:

In file included from arch/arm/mach-omap/gpmc.c:31:0:
arch/arm/mach-omap/include/mach/sys_info.h:93:83:
warning: inline function 'get_sysboot_value' declared but never defined

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

With this patch the barebox_update command will be extended by the possibility
to flash the MLO to eMMC devices.

The MLO will be flashed to the following addresses:
0x00000
0x20000
0x40000
0x60000

Because the first 512 Bytes of the MLO are reserved for the CHSETTINGS header
and this only use ~80 Bytes, there is space for the partition table in the
header.

The command will overwrite the bootstrap code area and will hold the
partition table and the Boot signature.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

This replaces the reset_cpu() function which every SoC or board must
provide with registered handlers. This makes it possible to have multiple
reset functions for boards which have multiple ways to reset the machine.
Also boards which have no way at all to reset the machine no longer
have to provide a dummy reset_cpu() function.

The problem this solves is that some machines have external PMICs or
similar to reset the system which have to be preferred over the
internal SoC reset, because the PMIC can reset not only the SoC but also
the external devices.

To pick the right way to reset a machine each handler has a priority. The
default priority is 100 and all currently existing restart handlers are
registered with this priority. of_get_restart_priority() allows to retrieve
the priority from the device tree which makes it possible for boards to
give certain restart handlers a higher priority in order to use this one
instead of the default one.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

The 32KHz from dmtimer0 is derived from a SoC internal RC oscillator
which is quite inaccurate. Switch to dmtimer2 which is driven from
the high frequency oscillator clock.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Conflicts:
	arch/arm/boards/beagle/board.c

The OMAP3 supports uploading the first stage bootloader via USB.
The ROM leaves the MUSB controller enabled and it can then be used
to upload a 2nd stage image. This patch adds the omap3-usb-loader tool
and the necessary barebox support to upload the 2nd stage image.

The omap usb loader tool is downloaded from https://github.com/grant-h/omap_loader
and changed to also accept CHSETTINGS images.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

U-Boot uses 2 as the DSS divider, so do the same in barebox. This
shouldn't currently have any effect to barebox, but makes porting
some U-Boot code easier which makes assumptions about the DSS clock
rate.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

The AM335x SPI NOR barebox update handlers only writes a file to a device,
so use the generic handler for this purpose.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Also activate in defconfig.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

This file originates in Linux.  Linux has it under include/linux/
directory since commit dccd2304cc90.
Let's move it to the same place as well in barebox.

This commit was generated by the following commands:

  find -name '*.[chS]' | xargs sed -i -e 's:<sizes.h>:<linux/sizes.h>:'
  git mv include/sizes.h include/linux/

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Add support for registering disabled boot devices from oftree.
Creating a device tree with all bootable devices disabled, makes
it possible to only enable and register the devices needed to
load the next stage bootloader.

Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

"Silicon revision 1.0 devices only provide the MMC2_DAT7 signal when Mode3 is
selected. Silicon revision 2.0 and newer devices implement another level of
pin multiplexing which provides the original MMC2_DAT7 signal or RMII2_CRS_DV
signal when Mode3 is selected. This new level of of pin multiplexing is
selected with bit zero of the SMA2 register."

See AM335x Sitara Processors Manual.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>