The CREDITS file was removed from barebox in 2015 by commit 6570288f2d97
("Remove the CREDITS file"). Remove references to it from several files.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Storing the boot information in the image itself and passing a pointer
around between images is cumbersome and doesn't fit well with multiimage
support where the pointer we pass around is already occupied by the
devicetree.
Do the same as U-Boot does and store the boot information at the bottom
of the SRAM public stack.
To maintain the compatibility between new xloaders and older barebox
binaries we still pass the boot information to the next stage via pointer.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

For OMAP4460 omap4_scale_vcores must set the voltage according to mpu freq.

OPP100  700MHz 1210mV
OPPTB   920MHz 1320mV
OPPNT  1200MHz 1380mV

Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

On OMAP4 SoC there is a SAR memory region (Save & Rescue)
where the ROM code reads the device to boot from.
This patch adds a way to set this.

Signed-off-by: Vicente Bergas <vicencb@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

The hsmmc module has a 0x100 offset in its register space. The real
register space size for the module is 4K, so when we register the
device with the size 4k, we have to account for the offset in the
driver, not in the resource allocation.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Add and use meaningful macro names for OMAP4 GPIO addresses, and add a
comment to explain the 0x100 offset for OMAP4.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: Vicente <vicencb@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Conflicts:
	arch/arm/include/asm/barebox-arm.h

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

The FSF address has changed in the past. Instead of updating it
each time the address changes, just drop it completely treewide.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

configure  Memory Adapter for 4460

Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

based on: [U-Boot] [PATCH v 4/5] omap4: support TPS programming
TPS62361 is the new power supply used in OMAP4460 that
supplies vdd_mpu.

VCORE1 from Phoenix supplies vdd_core and VCORE2 supplies
vdd_iva. VCORE3 is not used in OMAP4460.

Signed-off-by: F. Gasnier fabrice.gasnier@cenosys.com
Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Without yet adding in the underlying code, extend the revision
checking code to return additional values for PandaBoard ES boards.
Much of the code was taken close to verbatim from U-Boot.
compile tested, and confirmed that this code behaves identically to
the original panda configure and build for the three pandas i have:

  * Rev A2 (boots)
  * Rev EA3 (boots)
  * Rev B1 ES (no output)

so while there's still work to be done, this at least represents the
necessary infrastructure to start *recognizing* panda ES boards.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Tested-by: Anand Gadiyar <gadiyar@ti.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

scale_vcores is used by two boards.

Signed-off-by: Jan Weitzel <j.weitzel@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>