Since the commit
	5a1a5ed
	ARM: images: use piggydata

the loading mechanism in the arria10 xload is neither functional nor needed.
Now, barebox has/can be loaded like a normal image, so the filesize, that is
written to the barebox header, can be evaluated.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Fixes:

arch/arm/mach-socfpga/arria10-xload.c: In function 'arria10_prepare_mmc':
arch/arm/mach-socfpga/arria10-xload.c:339:40: warning: dereferencing 'void *' pointer

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Some Arria10 boards don't have the FPGA programmed externally.
Instead barebox needs to do that. As the Arria10 has the SDRAM
controller in the FPGA, the first thing we need to do is,
configure the FPGA before the SDRAM can even be used.

It works like this:
  1. boot ROM fetches the PBL from MMC
  2. read the MBR from MMC (this depends on the setup done by the boot ROM)
  3. read the Bitstream from the MMC and program the FPGA
  4. re-read the barebox image from MMC, this time with the full barebox
     that is appended to the PBL
  5. jump into the full barebox

Only supported boot device is eMMC.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>