This adds support for the i.MX8MM.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Basically the same as for i.MX8MQ, just some function split up needed
to account for different base addresses for the TF-A on both SoCs.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

This adds the DDR driver for the i.MX8MQ/i.MX8MM. It's taken from
U-Boot v2020.04-rc1 with slight modifications for barebox

The i.MX8MQ boards in the tree currently use the output of an earlier
version of the NXP i.MX8M DDR Tool which doesn't use a controller driver
but instead does most stuff in board code. It seems this can coexist
with the new driver, only a few helper functions that previously lived
in arch/arm/mach-imx/imx8-ddrc.c are now provided by the new driver.

Tested on an i.MX8MM EVK

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Most of the code in imx8mq.c can be reused for i.MX8MM, so rename it
and compile depending on CONFIG_ARCH_IMX8M.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Looks like usb-imx6.c was abandoned and there are no references to
either of the functions difined there. Drop it.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

The esdhc-xload code will be used by upcoming Layerscape support aswell,
so move it from architecture code to drivers/mci/.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Move GPT driver to drivers/clocksource and rename it to
timer-imx-gpt.c to match Linux kernel as well as to keep all
clocksource drivers in a common location.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

After being introduced 3 years ago this feature ended up being
"obsoleted by events" and project it was supposed to be a part of
winded down.

Revert this feature due to:

  a) Lack of users

  b) Existence of better way to make barebox load via SRAM as
  intermediary step that does not require two separate images to be
  built (.imx-sram-img)

This reverts commit 903c947.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Add imx8mq_atf_load_bl31() containing all of the code needed to load
and transfer control to BL31 ATF blob on i.MX8M.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Add DDRC PHY support code needed to upload DDR training firwmare as
well as to wait for the training process to complete.

Those are needed to support board specific DDR initialization code.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
[andrew.smirnov@gmail.com: fix B0 chips to report IMX_CHIP_REV_2_0]
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Move OCOTP driver to drivers/nvmem to be consistent with Linux
kerenel.

Cc: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Tested-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Otherwise the WFI instruction might not be available in a multi-image build.

Fixes: 1e9458720a23 (ARM: i.MX: provide handler for power off over standby)
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

Signed-off-by Juergen Borleis <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Move clk code from 'mach-imx' to 'drivers' to keep the code tree
structure closer to that of analogous one from Linux kernel and,
arguably although subjective, to keep 'mach-imx' less cluttered.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Some boards or SoCs need the SRC_SCR[WARM_RESET_ENABLE] bit cleared,
otherwise they won't come up after a watchdog reset. This was observed
on one i.MX6ul based custom board. The Linux Kernel does the same since
2012: 0575fb7 ARM: 7198/1: arm/imx6: add restart support for imx6q.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Nearly identical to Linux-4.8 clock support, only some unnecessary
clocks skipped.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Some i.MX53 want to setup the SDRAM from C code rather than
from DCD tables. The image size for these boards is limited
to the internal SRAM size. To overcome this limitation for
i.MX53 boards booting from NAND implement an xload mechanism
to load only the PBL to SRAM and let barebox load the rest
of the image itself after SDRAM has been initialized.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Add PBL xload code to load an image from SPI NOR flash. Currently implemented
for i.MX6.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

As boot.c now contains code for the pbl compile compile it there
awell. While at it move esdctl.c to obj-pbl-y.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Conflicts:
	common/Kconfig

The code can be used on i.MX28 aswell, so move it to a common place.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

This commit add a very basic code to allow Barebox to be booted from
IRAM. Given that the amount of IRAM on most i.MX variants is
insufficient to contain a copy of Barebox with any reasonable degree
of functionality this code uses IRAM only as a temporary location and
eventually bootstraps from DRAM. But the presense of the intermediate
IRAM-only stage allows to add provisions to test the area of DRAM that
Barebox would be using to facilitate various testing scenarious.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

This adds support for two gates from can only exclusively be enabled.
Based on the corresponding Linux code.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>