i2c: always walk down into i2c/busses Makefile ...

Otherwise CONFIG_I2C_IMX_EARLY won't be built if !CONFIG_I2C even
though it has no direct dependency on the i2c core.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

mci: MCI_IMX_ESDHC_PBL has no dependency on MCI ...

While it is located in the MCI deirectory, it has no direct dependency
on the MCI core, so it should not be under the MCI condition in Kconfig.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

port reduced version of remoteproc framework from linux ...

I tested it on phytec imx7 board with remoteproc ELF image previously used on
Linux. Linux would load this image, create appropriate resource (if defined in
image) and boot it. The barebox version is only loading image and boot it.

Currently barebox version do not extract resources defined by rproc ELF image.
On this early stage it is hard to say, if it is needed.

Previously there was an attempt to port bootaux command from u-boot.
Porting of remoteproc framework is my attempt to lead this topic in to the
(IMO) right direction.

To start remoteproc image, firmwareload command should be used:
firmwareload /mnt/tftp/rproc-imx-rproc-fw

Since firmwareload already support multiple targets, it is possible to
specify which exact cortex m4 CPU should be started (if multiple CPU are
present). This example shows the list of available firmware targets:
barebox@Phytec i.MX7 phyBOARD-Zeta:/ firmwareload -l
firmware programming handlers:

name:      model:
soc:imx7d-rp0@0.of

Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ddr: fsl: Add Freescale ddr driver ...

This adds the Freescale ddr driver used on various PowerPC and
Layerscape SoCs. This is based on U-Boot-2019.01 but with many
adjustments:

- PowerPC support has been removed
- CPP #ifdeffery replaced with C
- No more global variables/functions expected from the driver,
  configuration is passed by the board code which calls the driver

We already have the driver in the tree in an older version forked from
U-Boot-2013.04. This version lacks Layerscape support and many quirks
in the driver are PowerPC specific. Since the existing driver should
work on all known PowerPC and PowerPC is a dead end I decided not to
improve the existing driver and instead add a new Layerscape specific
driver.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

drivers: Import a very basic NVME implementation from Linux ...

Import a very abridged NVME implementation from Linux kernel in order
to be able to access NVME storage attached via PCIe.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

soc: imx: Add GPCv2 power gating driver ...

Port of a Linux commit 03aa126

  Add code allowing for control of various power domains managed by GPCv2
  IP block found in i.MX7 series of SoCs. Power domains covered by this
  patch are:

      - PCIE PHY
      - MIPI PHY
      - USB HSIC PHY
      - USB OTG1/2 PHY

  Support for any other power domain controlled by GPC is not present, and
  can be added at some later point.

  Testing of this code was done against a PCIe driver.

  Cc: yurovsky@gmail.com
  Cc: Lucas Stach <l.stach@pengutronix.de>
  Cc: Fabio Estevam <fabio.estevam@nxp.com>
  Cc: Dong Aisheng <dongas86@gmail.com>
  Cc: linux-arm-kernel@lists.infradead.org
  Cc: linux-kernel@vger.kernel.org
  Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
  Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Linux commit 9e01e2d was squashed
here as well:

  soc: imx: gpcv2: fix regulator deferred probe

  If a regulator requests a deferred probe, the power domain gets
  initialized twice. This leads to a list double add (without
  list debugging the kernel hangs due to the double add later):

    WARNING: CPU: 0 PID: 19 at lib/list_debug.c:31 __list_add_valid+0xbc/0xc4
    list_add double add: new=c1229754, prev=c12383b4, next=c1229754.

  Initialize the power domain after we get the regulator. Also do
  not print an error in case the regulator defers probing.

  Cc: Fabio Estevam <fabio.estevam@nxp.com>
  Cc: Andrey Smirnov <andrew.smirnov@gmail.com>
  Cc: linux-arm-kernel@lists.infradead.org
  Cc: linux-kernel@vger.kernel.org
  Fixes: 03aa12629fc4 ("soc: imx: Add GPCv2 power gating driver")
  Signed-off-by: Stefan Agner <stefan@agner.ch>
  Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com>
  Tested-by: Andrey Smirnov <andrew.smirnov@gmail.com>
  Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Linux commit 3637f12 was squashed
here as well

  soc: imx: gpcv2: correct PGC offset

  Correct MIPI/PCIe/USB_HSIC's PGC offset based on
  design RTL, the values in the Reference Manual
  (Rev. 1, 01/2018 and the older ones) are incorrect.

  The correct offset values should be as below:

  0x800 ~ 0x83F: PGC for core0 of A7 platform;
  0x840 ~ 0x87F: PGC for core1 of A7 platform;
  0x880 ~ 0x8BF: PGC for SCU of A7 platform;
  0xA00 ~ 0xA3F: PGC for fastmix/megamix;
  0xC00 ~ 0xC3F: PGC for MIPI PHY;
  0xC40 ~ 0xC7F: PGC for PCIe_PHY;
  0xC80 ~ 0xCBF: PGC for USB OTG1 PHY;
  0xCC0 ~ 0xCFF: PGC for USB OTG2 PHY;
  0xD00 ~ 0xD3F: PGC for USB HSIC PHY;

  Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
  Fixes: 03aa12629fc4 ("soc: imx: Add GPCv2 power gating driver")
  Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com>
  Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
  Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/tegra'

Merge branch 'for-next/nvmem'

add driver for Tegra124 memory controller ...

This driver performs the required initialization to get the GPU
into a functional state, so it can be used when the OS is running.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

drivers: add nvmem framework from kernel ...

Add the nvmem framework from Linux.

Based on the v4.4-rc3 version.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

drivers: add simple hw_random implementation ...

Add a simple hw_random implementation based on code from
Linux v4.5-rc5.

All the entropypool initialization stuff is left out and
the obsolete data_read/data_present calls are omitted.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

efi: move bus driver to driver/efi ...

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

efi: move block io driver to driver/block ...

so it can be reused on any ARCH

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

drivers: Introduce AIODEV subsystem ...

AIODEV/Aiodevice is a analog I/O framework that can be thought of as a
simplified hybrid between 'hwmon' and 'IIO' subsystems of Linux kernel

This commit is very heavily based on 'iodevice' framework proposal
written by Sascha Hauer.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

crypto: add i.MX6 CAAM support ...

Add the i.MX6 crypto core CAAM with support for the random number
generator.

The core itself works with jobrings in which descriptors can be
queued/dequeued for processing. Depending on descriptor type
the CAAM unit then either produces random numbers or decrypts/encrypts
data.

The code is based on the Linux v4.1 driver of the same name
without all the crypto/hashing components.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

imx: hab: rename driver dir to hab/ ...

There's not only HABv4 but also HABv3. No need to put the corresponding
code in separate directories, so rename the habv4 directory to hab.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

habv4: add High Assurance Boot v4 ...

This patch adds the code to check the HAB ROM for failures during development.
Add a cal to "habv4_get_status();" to your board file, to get the current
system state from the ROM.

_NOTE_: On i.MX6 this has to happen before barebox starts the MMU, because the
        HAB ROM vector table is placed at 0x94, which is not accessible after the
	MMU has setup the zero page.

This patch contains code ported from u-boot patches [1][2] by Shaojun Wang [3]
which were found in the "Mx28 Secure Boot" and "Mx6 HAB (High Assurance Boot)"
thread on the freescale community forum [4][5].

[1] https://community.freescale.com/servlet/JiveServlet/download/370047-269174/0001-enable-mx28-u-boot-hab.patch.txt.zip
[1] https://community.freescale.com/servlet/JiveServlet/download/96451-11-266175/0001-u-boot-enable-mx6-hab.patch.zip
[2] https://community.freescale.com/people/ShaojunWang
[3] https://community.freescale.com/thread/317254
[3] https://community.freescale.com/docs/DOC-96451

Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

add generic PHY framework ...

This brings in the generix PHY framework from Linux.
I tried to strip it down as much as possible while
keeping it useful.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Firmware: provide a handler to program Altera FPGAs ...

This handler uses a regular SPI master and a few GPIOs to program an
Altera FPGA in serial mode.

Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Add a simple rtc framework ...

This patch adds a simple rtc framework
for reading and setting board's RTC time.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: initial commit ...

used shorten version of linux-2.6.39 pci_ids.h

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

reset: add reset controller framework ...

Add stripped sown version of the reset controller
framework from the Linux kernel.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Add initial regulator support ...

Provide minimal regulator support. Only supported operations are enabling
and disabling regulators. Association of devices with their regulators is
limited to devicetree only. If regulator support is disabled the API expands
to static inline stubs so consumers can still use the API.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

bus: Add imx-weim support ...

Mostly taken from the kernel with support for other SoCs from
Alexander Shiyan.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Alexander Shiyan <shc_work@mail.ru>

Add initial pinctrl support ...

This is a massively stripped down pinctrl support. The upper API
consists of only of:

int pinctrl_select_state(struct device_d *dev, const char *state);

This is used to setup the pinmux for a device to a certain state.
This function normally does not need to be called manually. The
device core will setup the default state before probing a device.

The pinctrl core has the job of handling the devicetree. It parses
the pinctrl phandles for a device from devicetree, finds the correct
pinctrl device and calls its set_state callback with the pinctrl
setup device node.

The simplicity of this pinctrl framework comes from the fact that
we:

- Limit usage to devicetree only for now. For non devicetree use the
  old legacy SoC specific APIs still can be used.
- Do not parse the devicetree into internal data structures which
  are used by the drivers later. This adds the overhead that we
  may parse the devicetree multiple times for more dynamic setups,
  but on the other hand we do not need to parse devices from the
  devicetree we don't use in barebox
- Do not detect resource conflicts. Since the framework mainly is
  a devicetree parser this would be hard to implement. It should
  be easy for board maintainers to avoid resource conflicts though.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

of: make OFDEVICE a user selectable option ...

OFDEVICE decides whether or not we compile in support for probing
devices from the devicetree. Let the user decide this explicitly.
This makes the oftree, of_node and of_property commands independent
of devicetree device support since being able to manipulate
devicetrees has nothing to do with probing devices from the devicetree.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

nor flash: integrate into mtd ...

CFI Flash is currently handled outside the mtd layer which makes it
a special case. Integrate it into mtd so that we get rid of this
special status.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/bcm2835' ...

Conflicts:
	arch/arm/configs/versatilepb_defconfig

add 1-wire support ...

export for each device via param
the familly id (fid)
the id
the full reg_num

so for simple 64bit memory rom(ds2401/ds2411/ds1990*) no need driver.

Based on linux implementation, cleaned and re-implement the master/slave
support to use the device/driver model correctly.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

arm: add generic smp twd timer ...

on Cortex A9 and Cortex A5 we have a generic timer which we can use as
clocksource

Limit the timer frequency to < 25Mhz

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>