clk: migrate to SPDX-License-Identifier use ...

Some of these are a product of source sync with Linux, the other were
done with macro assistance by searching for /later/, deleting license text,
adding appropriate SPDX-License-Identifier and manual post-review.

Devices without a license indicated where assumed GPL-2.0-only according
with the project's license.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: divider: export clk_div_mask() helper ...

commit e6d3cc7 Linux upstream.

  clk: divider: export clk_div_mask() helper

  Export clk_div_mask() in clk-provider header so every clock providers
  derived from the generic clock divider may share the definition instead
  of redefining it.

  Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
  Signed-off-by: Michael Turquette <mturquette@baylibre.com>
  Signed-off-by: Stephen Boyd <sboyd@kernel.org>

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: divider: Make generic for usage elsewhere ...

commit bca9690 Linux upstream adjusted
to current Barebox codebase.

  clk: divider: Make generic for usage elsewhere

  Some devices don't use mmio to interact with dividers. Split out the
  logic from the register read/write parts so that we can reuse the
  division logic elsewhere.

  Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  Tested-by: Kenneth Westfield <kwestfie@codeaurora.org>
  Signed-off-by: Michael Turquette <mturquette@linaro.org>

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: divider: Fix best div calculation for power-of-two and table dividers ...

commit dd23c2c Linux upstream.

  clk: divider: Fix best div calculation for power-of-two and table dividers

  The divider returned by clk_divider_bestdiv() is likely to be invalid in case
  of power-of-two and table dividers when CLK_SET_RATE_PARENT flag isn't set.

  Fixes boot on STiH416 platform.

  Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
  Signed-off-by: Mike Turquette <mturquette@linaro.org>
  [mturquette@linaro.org: trivial merge conflict & updated changelog]

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: divider: Remove unused variable in clk_divider_recalc_rate ...

commit "clk: add divider_recalc_rate helper" reworked
clk_divider_recalc_rate() function and as part of that left one variable
assignment, which is not used later.

Fixes: e27c0b64db01 ("clk: add divider_recalc_rate helper")
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: divider: Support CLK_DIVIDER_READ_ONLY flag ...

To support a readonly divider add the CLK_DIVIDER_READ_ONLY flag.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: divider: pass divider flags ...

The generic clk divider needs clock flags and divider flags. Fix
prototypes to take both as separate arguments.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: add divider_recalc_rate helper ...

Closer to Linux kernel implementation and needed for imx8mq
composite clock.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: clk-divider: fix _get_maxdiv for table based divider ...

The divider lacks the code for calculating the maximum divider for table
based dividers. Add it.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

CLK: clk-divider: Respect CLK_DIVIDER_POWER_OF_TWO flag ...

Signed-off-by: Andrey Panov <rockford@yandex.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

CLK: clk-divider: Introduce clk_divider_alloc() and *_free() routines ...

Signed-off-by: Andrey Panov <rockford@yandex.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

CLK: clk-divider: Respect CLK_DIVIDER_HIWORD_MASK flag ...

It is required for Rockchip SoCs where clock settings registers have
write-enable mask in high word.

Signed-off-by: Andrey Panov <rockford@yandex.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: clk-divider: divider calculation in clk_set_rate needs DIV_ROUND_UP ...

To make the resulting rate is always smaller than the desired rate, and
not bigger.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: let clk-divider handle the table based divider aswell ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: clk-divider: sync with kernel code ...

This updates the clk-divider to Kernel code, but without power-of-two
divider support which we do not need yet. This also adds table based
divider support to the divider.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: clk-divider: pass flags to initializers ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: divider: Add onebased divider support ...

In some dividers the register value matches the divider value. This
patch adds support for them.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: initial common clk support ...

This adds barebox common clk support loosely based on the Kernel common
clk support. differences are:

- barebox does not need prepare/unprepare
- no parent rate propagation for set_rate
- struct clk is not really encapsulated from the drivers

Along with the clk support we have support for some basic clk building
blocks:

- clk-fixed
- clk-fixed-factor
- clk-mux
- clk-divider

clk-fixed and clk-fixed-factor are completely generic, clk-mux and clk-divider
are currently the way i.MX muxes/dividers are implemented.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>