mci: sdhci: add Atmel SDHCI (sama5d2, sam9x60) support ...

We already support Ethernet and QSPI on the SAMA5D2, but MMC was so far
missing. Port over the at91bootstrap driver to barebox. Some parts are
based on the U-Boot and Linux implementations.

To support future use in PBL, the driver model and driver implementation
parts are split into separate files with the latter being compilable for PBL
as well.

Registers, which are found in the common Linux sdhci.h have been added
to the barebox sdhci.h. Registers which appear to be Atmel specific have
been added to atmel-sdhci-common.c instead.

The driver still misses some parts, which will follow later:

  - ADMA is unsupported, PIO only for now
  - Only the SD/MMC controller already enabled by the first stage
    bootloader is supported. Further clocking changes appear
    to be necessary to enable another

Both can be retrofitted later on and don't hold us back from booting
from MMC.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

mci: sdhci: implement sdhci_reset() ...

SDHCI reset is common between many SDHCI variants. Add a library
function, so it can be reused.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

mci: sdhci: provide sdhci_readx_poll_timeout helpers ...

The sdhci_readN accessors don't lend themselves for clean use with
readx_poll_timeout because they accept two arguments. Add
a sdhci-specific helper, so the sdhci drivers can cut down on the
timeout loop boilerplate.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

mci: add Arasan SDHCI controller driver ...

This adds support for the Arasan SDHCI controller, which is found on
the Xilinx Zynq 7000 and ZynqMP SoCs. This just adds very basic
PIO read/write support.

This submission is also missing the tap delay configuration, which is
required for the high speed modes on the ZynqMP, but this can be
added in a separate patch once it is clear how the interface for this
feature should look like.

The driver skeleton was provided by Michael, most of the actual driver
porting work was done by Thomas and some coding style fixes and write
support bug fixes added by Lucas.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Signed-off-by: Thomas Haemmerle <thomas.haemmerle@wolfvision.net>
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

mci: sdhci: remove duplicate register defines for prsstat bits ...

We have duplicate register bit defines for the prsstat register.
Remove the duplicates.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

mci: sdhci: remove duplicate register defines for interrupt bits ...

We have duplicate bit defines for the interrupt bits. Remove the duplicates.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

mci: sdhci: remove duplicate transfer mode register defines ...

We have duplicate register bit defines for the transfer mode register.
Remove the duplicates.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

mci: sdhci: remove 32bit register defines ...

The 32bit register defines are no longer used. Remove them.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

mci: imx-esdhc: use sdhci helpers ...

To use the sdhci helpers we have to switch to the sdhci accessors.
Also use sdhci_read_response().

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

mci: sdhci: Add missing command type defines ...

Add some missing register definitions.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

mci: Add sdhci helper ...

We have several SDHCI compatible drivers in the tree. This starts
with a set of generic helper functions for these drivers to share
some common functionality.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

mci: add Marvell Dove SDHCI driver ...

This adds a driver for the SDHCI controller found on Marvell Dove SoCs.
Despite a missing pinctrl driver, corresponding MPP config has to be
set on a per board basis.

This driver was succesfully tested with Solidrun Dove Cubox.

Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

MMC: IMX: Reset MMC_BOOT register after controller reset. ...

This helps with EMMC detection when booting from EMMC directly.
Taken from u-boot.

Signed-off-by: Andrey Panov <rockford@yandex.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

MCI: imx-esdhc: implement workaround for errata ENGcm12360 ...

At least i.MX53 has errata ENGcm12360:

Occurs when a pending command which issues busy is completed.
For a command with R1b response, the proper software sequence
is to poll the DLA for R1b commands to determine busy
state completion. The DLA polling is not working properly for
the ESDHC module. This is relevant for all eSDHC ports (eSDHC1-4 ports)

DLA bit in PRSSTAT register cannot be
polled to wait for busy state completion.

Updated block guide to reflect that DLA is not applicable to detect
busy state, instead, should poll bit 24 in PRSSTAT register (DLSL[0] bit)
to check that wait busy state is over.

Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

mci: sdhci: fix IRQSTAT_DMAE bit shift ...

According to the SD Host Controller Specification Version 3.00, the ADMA error
status bit is on the wrong bit. Fix this.

While at it, add the missing standard error status bits.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

mci i.MX esdhc: Fix clock divider calculation ...

This updates the i.MX esdhc divider settings to FSLs U-Boot.
Current timings work fine for SD cards, but not for eMMC.
Although the calculation is fine according to the datasheet and reading from
eMMC works, writing is broken. Atleast on i.MX53/tqma53.
With this patch the result is the same, but uses different divider values to
achieve it.

While at it, replace the udelay with a busy-loop.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

mci: imx-esdhc: factor out common sdhci registers ...

This gives the SDHCI specific registers a common name and moves
them to a separate file for use by other SDHCI like drivers.

The SDHCI spec has some 16bit and 8bit registers. The i.MX accesses
these as 32bit registers. These register defines now are named after
the SDHCI registers they combine into one, for example:

SDHCI_HOST_CONTROL__POWER_CONTROL__BLOCK_GAP_CONTROL

is the 32bit version of the SDHCI registers HOST_CONTROL, POWER_CONTROL
and BLOCK_GAP_CONTROL.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>