PCI: imx6: Introduce drvdata ...

Port of a Linux commit e8e4d4e

  Introduce driver data struct. This will simplify handling of device
  specific differences.

  Signed-off-by: Stefan Agner <stefan@agner.ch>
  [andrew.smirnov@gmail.com reformatted drvdata, to simplify future diffs]
  Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
  Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
  Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
  Cc: Bjorn Helgaas <bhelgaas@google.com>
  Cc: Fabio Estevam <fabio.estevam@nxp.com>
  Cc: Chris Healy <cphealy@gmail.com>
  Cc: Lucas Stach <l.stach@pengutronix.de>
  Cc: Leonard Crestez <leonard.crestez@nxp.com>
  Cc: "A.s. Dong" <aisheng.dong@nxp.com>
  Cc: Richard Zhu <hongxing.zhu@nxp.com>

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: dwc: Fix pointer width cast problem ...

Casting to u32 works well on 32-bit builds, but causes problem when
compiled on 64-bit machines. Switch it to cast to "unsigned long", so
that it would have appropriate width in both cases.

While at it, replace explicit casts to void * with IOMEM.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

treewide: Remove trailing whitespaces and tabs ...

Just a cleanup over barebox tree

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: imx6: Port imx6_pcie_ltssm_enable() ...

Port imx6_pcie_ltssm_enable() from Linux kernel driver.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: imx6: Drop unnecessary root_bus_nr setting ...

Port of a Linux commit 39f712e

  Function dw_pcie_host_init() already initializes the root_bus_nr field
  of 'struct pcie_port', so the -1 assignment prior to calling
  dw_pcie_host_init() in platform specific driver is not really needed.
  Drop it.

  Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
  Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
  Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
  Cc: Richard Zhu <hongxing.zhu@nxp.com>
  Cc: Lucas Stach <l.stach@pengutronix.de>

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: imx6: Fix spelling mistake: "contol" -> "control" ...

Port of a Linux commit 7221547

  Trivial fix to spelling mistake in dev_err message

  Signed-off-by: Colin Ian King <colin.king@canonical.com>
  Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
  Acked-by: Richard Zhu <hongxing.Zhu@nxp.com>

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: imx6: Do not switch speed if Gen2 is disabled ...

Port of a Linux commit 93b226f

  Save a bit of time and avoid going through link speed change procedure in
  configuration where link max speed is limited to Gen1 in DT.

  Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
  Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
  Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
  Cc: yurovsky@gmail.com
  Cc: Fabio Estevam <fabio.estevam@nxp.com>
  Cc: Dong Aisheng <dongas86@gmail.com>
  Cc: linux-arm-kernel@lists.infradead.org

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: imx6: Do not wait for speed change on i.MX7 ...

Port of a Linux commit e6dcd87

  As can be seen from [1]:

    "...the different behavior between iMX6Q PCIe and iMX7D PCIe maybe caused
    by the different controller version.

    Regarding to the DOC description, the DIRECT_SPEED_CHANGE should be
    cleared after the speed change from GEN1 to GEN2. Unfortunately, when
    GEN1 device is used, the behavior is not documented.

    So, IC design guys run the simulation and find out the following
    behaviors:

       1. DIRECT_SPEED_CHANGE will be cleared in 7D after speed change
          from GEN1 to GEN2. This matches doc’s description

       2. set MAX link speed(PCIE_CAP_TARGET_LINK_SPEED=0x01) as GEN1 and
          re-run the simulation, DIRECT_SPEED_CHANGE will not be cleared;
          remain as 1, this matches your result, but function test is
          passed, so this bit should not affect the normal PCIe function."

  imx6_pcie_wait_for_speed_change() will report false failures for Gen1 ->
  Gen1 speed transition, so avoid doing that check and just rely on
  imx6_pcie_wait_for_link() only.

  [1] https://community.nxp.com/message/867943

  Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
  Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
  Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
  Cc: yurovsky@gmail.com
  Cc: Fabio Estevam <fabio.estevam@nxp.com>
  Cc: Dong Aisheng <dongas86@gmail.com>
  Cc: linux-arm-kernel@lists.infradead.org

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: imx6: Allow probe deferral by reset GPIO ...

Port of a Linux commit bde4a5a

  Some designs implement reset GPIO via a GPIO expander connected to a
  peripheral bus.  One such example would be i.MX7 Sabre board where said
  GPIO is provided by SPI shift register connected to a bitbanged SPI bus.
  To support such designs, allow reset GPIO request to defer probing of the
  driver.

  Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
  Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
  Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
  Cc: yurovsky@gmail.com
  Cc: Fabio Estevam <fabio.estevam@nxp.com>
  Cc: Dong Aisheng <dongas86@gmail.com>
  Cc: linux-arm-kernel@lists.infradead.org

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: imx6: Add code to support i.MX7D ...

Port of a Linux commit 9b3fe67

  Add various bits of code needed to support i.MX7D variant of the IP.

  Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
  Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
  Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
  Acked-by: Lee Jones <lee.jones@linaro.org>
  Acked-by: Rob Herring <robh@kernel.org>
  Cc: yurovsky@gmail.com
  Cc: Mark Rutland <mark.rutland@arm.com>
  Cc: Fabio Estevam <fabio.estevam@nxp.com>
  Cc: Dong Aisheng <dongas86@gmail.com>
  Cc: linux-arm-kernel@lists.infradead.org
  Cc: devicetree@vger.kernel.org

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: Consify pci_ops in struct pci_controller ...

Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: Convert ->res_start() to return resource_size_t ...

On 64-bit machines int doesn't cover full address space, so convert
.res_start to both accept resource_size_t as a parameter and return it
as result.

Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: Assume 1:1 mapping if .res_start callback is NULL ...

Save a bit of no-op boilerplate by converting pci_iomap() to treat
absense of .res_start callback as an indicator that 1:1 mapping is
being used.

Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: Simplify alloc_pci_dev() ...

Use xzalloc() to allocate PCI device and drop OOM checking code.

Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: Drop "rom_address" from struct pci_dev ...

This field is not being used in Barebox. Drop it.

Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: Drop "ops" from struct pci_bus ...

Drop "ops" from struct pci_bus, since the same struct can be accessed
via host->pci_ops. No functional change intended.

Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: Drop "resources" from struct pci_bus ...

This field is not used by Barebox. Remove it. No functional change
intended.

Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: Drop "slots" from struct pci_bus ...

This field is not used by Barebox. Remove it. No functional change
intended.

Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: Make pci_scan_bus static ...

Pci_scan_bus is not used anyhwere outside pci.c. Mark in static to
reflect that. No functional change intended.

Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: Remove unused variables/code ...

Both host_head and host_tail are not used anywhere in the codebase and
look like a leftover. Remove them.

Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: Store and reuse BAR offsets ...

Save and reuse BAR offsets in dedicated constants instead of repeating
the same expression multiple times. No functional change intended.

Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: Simplify resource setup code in setup_device() ...

Simplify resource setup code in setup_device() by factoring out all of
the common code and moving it outside the if main if statement. No
functional change intended.

Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: Remove superfluous parens in setup_device() ...

Remove superfluous parens in setup_device(). No functional change
intended.

Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: Replace magic number in setup_device() ...

User PCI_BASE_ADDRESS_SPACE_IO instead of explicit magic number. No
functional change intended.

Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: Switch to using %pa to print memory addresses ...

Switch to using %pa to print memory addresses in order to be able to
support both 64 and 32 bit builds.

Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: dwc: Constify dw_pcie_host_ops structures ...

Port of a Linux commit 4ab2e7c

  The dw_pcie_host_ops structures are never modified.  Constify these
  structures such that these can be write-protected.

  Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
  Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
  Acked-by: Jingoo Han <jingoohan1@gmail.com>
  Acked-by: Kishon Vijay Abraham I <kishon@ti.com>

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: dwc: Small computation improvement ...

Port of a Linux commit 6995de2

  Replace a division by 2 operation for a right shift rotation of 1 bit.

  Probably any recent and decent compiler does this kind of substitution
  in order to improve code performance. Nevertheless it's a coding good
  practice whenever there is a division / multiplication by multiple of 2
  to replace it by the equivalent operation in this case, the shift
  rotation.

  Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
  Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
  Acked-by: Jingoo Han <jingoohan1@gmail.com>
  Acked-by: Joao Pinto <jpinto@synopsys.com>

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: dwc: Fix enumeration end when reaching root subordinate ...

Port of a Linux commit c2deae4

  The subordinate value indicates the highest bus number which can be
  reached downstream though a certain device.

  Commit a20c7f36bd3d ("PCI: Do not allocate more buses than available in
  parent")
  ensures that downstream devices cannot assign busnumbers higher than the
  upstream device subordinate number, which was indeed illogical.

  By default, dw_pcie_setup_rc() inits the Root Complex subordinate to a
  value of 0x01.

  Due to this combined with above commit, enumeration stops digging deeper
  downstream as soon as bus num 0x01 has been assigned, which is always
  the case for a bridge device.

  This results in all devices behind a bridge bus to remain undetected, as
  these would be connected to bus 0x02 or higher.

  Fix this by initializing the RC to a subordinate value of 0xff, which is
  not altering hardware behaviour in any way, but informs probing
  function pci_scan_bridge() later on which reads this value back from
  register.

  Following nasty errors during boot are also fixed by this:

  [    0.459145] pci_bus 0000:02: busn_res: can not insert [bus 02-ff]
  under [bus 01] (conflicts with (null) [bus 01])
  ...
  [    0.464515] pci_bus 0000:03: [bus 03] partially hidden behind bridge
  0000:01 [bus 01]
  ...
  [    0.464892] pci_bus 0000:04: [bus 04] partially hidden behind bridge
  0000:01 [bus 01]
  ...
  [    0.466488] pci_bus 0000:05: [bus 05] partially hidden behind bridge
  0000:01 [bus 01]
  [    0.466506] pci_bus 0000:02: busn_res: [bus 02-ff] end is updated to
  05
  [    0.466517] pci_bus 0000:02: busn_res: can not insert [bus 02-05]
  under [bus 01] (conflicts with (null) [bus 01])
  [    0.466534] pci_bus 0000:02: [bus 02-05] partially hidden behind
  bridge 0000:01 [bus 01]

  Fixes: a20c7f36bd3d ("PCI: Do not allocate more buses than available in
  parent")
  Tested-by: Niklas Cassel <niklas.cassel@axis.com>
  Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
  Tested-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
  Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
  Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
  Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
  Acked-by: Lucas Stach <l.stach@pengutronix.de>
  Cc: <stable@vger.kernel.org> # 4.15
  Cc: Binghui Wang <wangbinghui@hisilicon.com>
  Cc: Bjorn Helgaas <bhelgaas@google.com>
  Cc: Jesper Nilsson <jesper.nilsson@axis.com>
  Cc: Jianguo Sun <sunjianguo1@huawei.com>
  Cc: Jingoo Han <jingoohan1@gmail.com>
  Cc: Kishon Vijay Abraham I <kishon@ti.com>
  Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
  Cc: Lucas Stach <l.stach@pengutronix.de>
  Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
  Cc: Minghuan Lian <minghuan.Lian@freescale.com>
  Cc: Mingkai Hu <mingkai.hu@freescale.com>
  Cc: Murali Karicheri <m-karicheri2@ti.com>
  Cc: Pratyush Anand <pratyush.anand@gmail.com>
  Cc: Richard Zhu <hongxing.zhu@nxp.com>
  Cc: Roy Zang <tie-fei.zang@freescale.com>
  Cc: Shawn Guo <shawn.guo@linaro.org>
  Cc: Stanimir Varbanov <svarbanov@mm-sol.com>
  Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  Cc: Xiaowei Song <songxiaowei@hisilicon.com>
  Cc: Zhou Wang <wangzhou1@hisilicon.com>

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: dwc: Enable write permission for Class Code, Interrupt Pin updates ...

Port of a Linux commit d91dfe5

  dw_pcie_setup_rc() contains fixes to update the Class Code and Interrupt
  Pin registers, but the fixes don't actually work because these registers
  are read-only.

  Enable write permission before updating the Class Code and Interrupt
  Pin.

  Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
  Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
  Acked-by: Joao Pinto <jpinto@synopsys.com>
  Acked-by: Roy Zang <tie-fei.zang@freescale.com>

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PCI: dwc: Add accessors for write permission of DBI ...

Port of a Linux commit e44abfe

  The read-only DBI registers can be written only when the "Write to RO
  Registers Using DBI" (DBI_RO_WR_EN) field of MISC_CONTROL_1_OFF is set.

  Add accessors to enable and disable write permission, and use them instead
  of accessing MISC_CONTROL_1_OFF directly.

  Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
  Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
  Acked-by: Joao Pinto <jpinto@synopsys.com>
  Acked-by: Roy Zang <tie-fei.zang@freescale.com>

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>