soc: imx: gpcv2: add support for i.MX8MQ SoC ...

Port of a Linux commit 685efff

  The GPCv2 on the Freescale i.MX8MQ SoC works in the same way as the
  GPCv2 on the i.MX7, but only controls more power domains with a
  different mapping.

  Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
  Acked-by: Rob Herring <robh@kernel.org>
  Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

soc: imx: gpcv2: prefix i.MX7 specific defines ...

Port of a Linux commit a800f41

  So we can add i.MX8M support without introducing name clashes.

  Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
  Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

soc: imx: gpcv2: Switch to SPDX identifier ...

Port of a Linux commit 8d8e3b7

  Adopt the SPDX license identifier headers to ease license compliance
  management.

  Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
  Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

soc: imx: gpcv2: make pgc driver more generic for other i.MX platforms ...

Port of a Linux commit 73f5971

  i.MX8MQ and i.MX8MM share same gpc module with i.MX7D, they
  can reuse gpcv2 pgc driver for power domain control, this
  patch renames all functions and structure definitions started
  with "imx7" to "imx", and use .data in imx_gpcv2_dt_ids[] to
  pass platform specific power domain data for power domain
  driver, thus make gpcv2 pgc driver more generic for i.MX
  platforms.

  Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
  Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com>
  Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

soc: imx: gpcv2: use A_CORE instread of A7 for more i.MX platforms ...

Port of a Linux commit fea88b2

  gpcv2 driver is NOT just used on i.MX7D which has Cortex-A7
  cores, but also on i.MX8MQ/i.MX8MM platforms which use Cortex-A53
  cores, so let's use A_CORE instread of A7 to avoid confusion.

  Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
  Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com>
  Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

soc: imx: Add GPCv2 power gating driver ...

Port of a Linux commit 03aa126

  Add code allowing for control of various power domains managed by GPCv2
  IP block found in i.MX7 series of SoCs. Power domains covered by this
  patch are:

      - PCIE PHY
      - MIPI PHY
      - USB HSIC PHY
      - USB OTG1/2 PHY

  Support for any other power domain controlled by GPC is not present, and
  can be added at some later point.

  Testing of this code was done against a PCIe driver.

  Cc: yurovsky@gmail.com
  Cc: Lucas Stach <l.stach@pengutronix.de>
  Cc: Fabio Estevam <fabio.estevam@nxp.com>
  Cc: Dong Aisheng <dongas86@gmail.com>
  Cc: linux-arm-kernel@lists.infradead.org
  Cc: linux-kernel@vger.kernel.org
  Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
  Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Linux commit 9e01e2d was squashed
here as well:

  soc: imx: gpcv2: fix regulator deferred probe

  If a regulator requests a deferred probe, the power domain gets
  initialized twice. This leads to a list double add (without
  list debugging the kernel hangs due to the double add later):

    WARNING: CPU: 0 PID: 19 at lib/list_debug.c:31 __list_add_valid+0xbc/0xc4
    list_add double add: new=c1229754, prev=c12383b4, next=c1229754.

  Initialize the power domain after we get the regulator. Also do
  not print an error in case the regulator defers probing.

  Cc: Fabio Estevam <fabio.estevam@nxp.com>
  Cc: Andrey Smirnov <andrew.smirnov@gmail.com>
  Cc: linux-arm-kernel@lists.infradead.org
  Cc: linux-kernel@vger.kernel.org
  Fixes: 03aa12629fc4 ("soc: imx: Add GPCv2 power gating driver")
  Signed-off-by: Stefan Agner <stefan@agner.ch>
  Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com>
  Tested-by: Andrey Smirnov <andrew.smirnov@gmail.com>
  Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Linux commit 3637f12 was squashed
here as well

  soc: imx: gpcv2: correct PGC offset

  Correct MIPI/PCIe/USB_HSIC's PGC offset based on
  design RTL, the values in the Reference Manual
  (Rev. 1, 01/2018 and the older ones) are incorrect.

  The correct offset values should be as below:

  0x800 ~ 0x83F: PGC for core0 of A7 platform;
  0x840 ~ 0x87F: PGC for core1 of A7 platform;
  0x880 ~ 0x8BF: PGC for SCU of A7 platform;
  0xA00 ~ 0xA3F: PGC for fastmix/megamix;
  0xC00 ~ 0xC3F: PGC for MIPI PHY;
  0xC40 ~ 0xC7F: PGC for PCIe_PHY;
  0xC80 ~ 0xCBF: PGC for USB OTG1 PHY;
  0xCC0 ~ 0xCFF: PGC for USB OTG2 PHY;
  0xD00 ~ 0xD3F: PGC for USB HSIC PHY;

  Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
  Fixes: 03aa12629fc4 ("soc: imx: Add GPCv2 power gating driver")
  Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com>
  Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
  Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>