image: add stm32 images to gitignore ...

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

images: gitignore more files ...

Layerscape generates .image files and mvebu generates .mvebu1img files.
git Ignore them.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

image: add zynqimg to gitignore ...

Those are results of the Zynq image build, don't clobber the
git status output.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

images/.gitignore: ignore i.MX8MQ HAB files ...

Ignore the new image files with .pimximg and .psimximg extensions and
the sha256 sum files.

Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/misc'

images: ignore *.csfbin files ...

The csfbin files are created during a HABV4 build, ignore them since they
are automatically generated.

Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

images: remove forgotten occurences of *.imx-sram-img ...

Starting with commit 5a1a5ed2537d ("ARM: images: use piggydata") this file type
is not known anymore, so clean up.

Signed-off-by: Ulrich Ölmann <u.oelmann@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: images: use piggydata ...

The way we assemble the multi images on ARM is rather complicated and
error prone. We currently cat the compressed barebox image behind the
PBL executable and need some magic to obtain the size of the payload and
also have to do tricks to reliably get a pointer to the compressed
image.

This patch switches over to compile the compressed payload into the PBL
image itself which has proven to work for the single PBL case and for
the ARM Linux Kernel aswell.

The goal is to unify the single PBL and the multi PBL cases together in
the future to get an easier startup path for ARM.

This patch has been tested on the i.MX53 QSB, i.MX53 Vincell, Beaglebone
black (both MLO and 2nd stage) and a Phytec phyFLEX i.MX6 board.

SoCFPGA Arria10 has also be changed slightly with this patch. We used to
generate a single image (barebox-socfpga-achilles.img) which was
used as xload image and full image. We now instead generate two images:
barebox-socfpga-achilles-xload.img and barebox-socfpga-achilles.img, the
former loaded by the ROM and the latter loaded by the xload image.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

gitignore: Add *.pblx files ...

Looks like *.pblx was accidentally dropped from ignored files list and
now my "git status" is clobbered by every *.pblx image that is being
built (that's quite a lot for imx_v7_defconfig). Re-add original rule
to prevent that.

Fixes eed8a41c5 ("gitignore: ignore pblx.simximg files")

Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

gitignore: ignore pblx.simximg files ...

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>

images: ignore *.imx-sram-img ...

Add pattern to gitignore to hide files:

    start_imx6_cm_fx6.imx-sram-img
    start_imx6_utilite.imx-sram-img

Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

images: add HABv4 support for i.MX6 ...

This patch adds high assurance boot support (HABv4) image generation to
barebox, currently tested on i.MX6 only.

In order to build a signed barebox image, add a new image target to
images/Makefile.imx as illustrated in the diff below:

- - - a/images/Makefile.imx
+ + + b/images/Makefile.imx
@@ -163,10 +163,14 @@ image-$(CONFIG_MACH_SABRELITE) += barebox-freescale-imx6dl-sabrelite.img
 pblx-$(CONFIG_MACH_SABRESD) += start_imx6q_sabresd
 CFG_start_imx6q_sabresd.pblx.imximg = $(board)/freescale-mx6-sabresd/flash-header-mx6-sabresd.imxcfg
 FILE_barebox-freescale-imx6q-sabresd.img = start_imx6q_sabresd.pblx.imximg
 image-$(CONFIG_MACH_SABRESD) += barebox-freescale-imx6q-sabresd.img

+CSF_start_imx6q_sabresd.pblx.imximg = $(havb4_imx6csf)
+FILE_barebox-freescale-imx6q-sabresd-signed.img = start_imx6q_sabresd.pblx.imximg.signed
+image-$(CONFIG_MACH_SABRESD) += barebox-freescale-imx6q-sabresd-signed.img
+

Here the default i.MX6 CSF file $(havb4_imx6csf) is used, it's generated during
build on from the template "scripts/habv4/habv4-imx6.csf.in". You can configure
the paths to the SRK table and certificates via: System Type -> i.MX specific
settings -> HABv4 support.

The proprietary tool "cst" by Freescale tool is expected in the PATH.

Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: MXS: Add multiimage support ...

The Freescale MXS SoCs have a multi staged boot process which needs
different images composed out of different binaries. The ROM executes
a so called bootstream which contains multiple executables. The first
one is executed in SRAM and the purpose of this binary is to setup
the internal PMIC and the SDRAM. The second image is usually the
bootloader itself. In case of barebox the bootstream is composed
out of the self extracting barebox image (pblx) and the prepare
stage for setting up the SDRAM.

The bootstream image itself is useful for USB boot, but for booting from
SD cards or NAND a BCB header has to be prepended to the image. In case
of SD boot the image has the .mxssd file extension in barebox.

Since the bootstream images are encrypted they are not suitable for
2nd stage execution. For this purpose the 2nd stage images are generated.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

images: ignore and clean *.mlo/*.mlospi ...

Add *./mlo and *.mlospi to the clean rule and to .gitignore.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

images: add Tegra124 image build rules ...

Allows to build persistent images for the Tegra124
line of SoCs.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

images: add Tegra30 image build rules ...

Allows to build persistent images for the Tegra30
line of SoCs.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

images: add Tegra20 image build rules ...

Allows to build persistent images for the Tegra20
line of SoCs.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: Add Altera SoCFPGA support ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mvebu: introduce multi image support ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

image: Add .gitignore ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>