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History for barebox / arch / arm / cpu / mmu.c

2013-03-07	b08e085 Browse files » ARN: fixup vector addresses for relocatable binaries ... With relocatable binaries the vector addresses cannot be supplied by the linker. This adds support for fixing them up during runtime. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 7 Mar 2013
2013-02-11	6061d3b Browse files » arm: move outercase to cpu.c as some SoC as the ux500 always need to flush the l2x0 ... Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Jean-Christophe PLAGNIOL-VILLARD authored on 11 Feb 2013 Sascha Hauer committed on 11 Feb 2013
2013-02-11	caf0661 Browse files » ARM: mmu: Clear unpredictable bits for translation table ... Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Alexander Shiyan authored on 8 Feb 2013 Sascha Hauer committed on 11 Feb 2013
2013-02-04	02c0f0b Browse files » ARM mmu: pickup already enabled mmu ... Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 4 Feb 2013
2013-02-04	da5fe0b Browse files » Merge branch 'for-next/misc' Sascha Hauer committed on 4 Feb 2013
2013-01-27	5596d88 Browse files » ARM mmu: Use pr_debug ... Also, specify a pr_fmt and add missing GPL header. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 27 Jan 2013
2013-01-25	56f99ec Browse files » arm-mmu: switch pte flags vars to lower case ... Old cache/uncache pte flags were declared as defines. Since these flags are determine at runtime they are static variables. This patch switch the naming style of these variables to lower case which is typically used for variables. Signed-off-by: Alexander Aring <alex.aring@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Alexander Aring authored on 24 Jan 2013 Sascha Hauer committed on 25 Jan 2013
2013-01-18	d32b75f Browse files » arm-mmu: move PAGE_ALIGN macro to common.h ... PAGE_ALIGN macro is needed to align addresses to page boundaries. Move this macro to another PAGE_* defines. Commands which uses remap_range function needs this macro. Signed-off-by: Alexander Aring <alex.aring@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Alexander Aring authored on 15 Jan 2013 Sascha Hauer committed on 18 Jan 2013
2013-01-18	47326f8 Browse files » remap_range: make function 'remap_range' global ... Change function remap_range in arm architecture to make it global accessable. For example command 'memtest' can change pte flags to enable or disable cache. Add dummy function for others architectures that doesn't have mmu or pte support. Signed-off-by: Alexander Aring <alex.aring@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Alexander Aring authored on 15 Jan 2013 Sascha Hauer committed on 18 Jan 2013
2013-01-14	1431f4a Browse files » arm-mmu: remove semicolon in arm mmu.c ... Remove semicolon in PAGE_ALIGN macro. Signed-off-by: Alexander Aring <alex.aring@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Alexander Aring authored on 13 Jan 2013 Sascha Hauer committed on 14 Jan 2013
2012-10-13	1dbfd5e Browse files » ARM: Support multiple ARM architectures ... The different ARM architectures need different cache functions. This patch makes them selectable during runtime. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 13 Oct 2012
2012-09-16	d24bb05 Browse files » ARM mmu: use xmemalign ... So we do not silently fail. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 16 Sep 2012
2012-08-13	a3a103c Browse files » ARM MMU: call __mmu_cache_* as regular C functions ... Now that __mmu_cache_* restore the registers they can be called as regular C functions. Create a header file for them and use C functions rather than inline assembly. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 13 Aug 2012
2012-07-03	cca17e2 Browse files » ARM mmu: flush page tables in arm_mmu_remap_sdram() ... Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 3 Jul 2012
2012-06-30	76df95b Browse files » ARM mmu: don't use CONFIG_MMU to disable mmu code, there are static inline versions ... Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Marc Kleine-Budde authored on 20 Jun 2012 Sascha Hauer committed on 30 Jun 2012
2012-02-28	2c2d00a Browse files » ARM: move exception vectors away from start of binary ... Traditionally U-Boot and barebox have the exception vectors at the start of the binary. There is no real reason in doing so, because in the majority of cases this data will not be at 0x0 where it could be used as vectors directly anyway. This patch puts the vectors into a separate linker section and defines an head function which is placed at the start of the image instead. Putting this in a separate function also has the advantage that it can be placed at the start of images which require an additional header like several Freescale i.MX images. As the head function contains the barebox arm magic those images can now also be detected as barebox images. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 28 Feb 2012
2012-01-05	0d22025 Browse files » Merge branch 'next' Sascha Hauer committed on 5 Jan 2012
2012-01-02	b936cd4 Browse files » ARM: mark 'lr' as clobbered by inline assembler ... When executing 'bl' in inline assembler, the 'lr' register must be marked as clobbered too. Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Enrico Scholz authored on 2 Jan 2012 Sascha Hauer committed on 2 Jan 2012
2011-12-21	0a9083d Browse files » arch/arm: mmu: add map_io_range() ... Add a function to remap an IO range into a virtual addresses range. This is particulary usefull for the few devices mapped at physical address 0, as the MTD boot devices. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Robert Jarzmik authored on 19 Dec 2011 Sascha Hauer committed on 21 Dec 2011
2011-11-27	77fe6dc Browse files » arm: trivial renaming create_sections ... Rename create_section into create_sections, as the function is used to create multiple sections, and in particular it creates the 4096 sections of 1MBytes to have a 1:1 flat mapping of the 4GBytes address space. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Robert Jarzmik authored on 26 Nov 2011 Sascha Hauer committed on 27 Nov 2011
2011-09-23	deef916 Browse files » ARM: switch to generic memory banks ... Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 23 Sep 2011
2011-09-23	b4e4684 Browse files » ARM mmu: find second level descriptors by walking the page table ... By doing this we can remove the ptes field in struct arm_memory which won't be present in a generic memory bank structure anymore. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 23 Sep 2011
2011-08-07	abcf935 Browse files » ARM mmu: use high vectors if possible ... Using high vectors allows us to map a faulting zero page to catch NULL pointer dereferences. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 7 Aug 2011
2011-08-07	606bd7d Browse files » ARM mmu: fix arm_create_pte ... Each section is 1MiB, so we have to shift by 20 to get the ttb entry corresponding to a section. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 7 Aug 2011
2011-08-03	56c3791 Browse files » ARM mmu: Fix arm_create_pte ... Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 3 Aug 2011
	a6c333c Browse files » ARM boards: remove now unnecessary mmu calls ... Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Sascha Hauer committed on 3 Aug 2011
	3100ea1 Browse files » ARM: rework MMU support ... In barebox we used 1MiB sections to map our SDRAM cachable. This has the drawback that we have to map our sdram twice: cached for normal sdram and uncached for DMA operations. As address space gets sparse on newer systems we are sometines unable to find a suitably big enough area for the dma coherent space. This patch changes the MMU code to use second level page tables. With it we can implement dma_alloc_coherent as normal malloc, we just have to remap the allocated area uncached afterwards and map it cached again after free(). This makes arm_create_section(), setup_dma_coherent() and mmu_enable() noops. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 3 Aug 2011
2011-08-01	8ba794a Browse files » ARM: pass size to dma_free_coherent ... We'll need it later once we remap dma memory. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer authored on 29 Jul 2011 Jean-Christophe PLAGNIOL-VILLARD committed on 1 Aug 2011
2011-03-10	cad1448 Browse files » ARM: create a second level page table entry for the exception vectors ... Often enough the exception vectors are not on TEXT_BASE (for example on i.MX SoCs in internal boot mode), so the board specific code did not map the exception vectors to 0x0 but whatever happens to be on TEXT_BASE. Also, the current section-only mapping requires the exception vectors to be on a 1MB boundary. Instead, create the possibility to create second level tables and use this to map a copy of the exception vectors in a board independent way. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 10 Mar 2011
2011-03-08	1c33aac Browse files » ARM: use memalign to allocate page table ... We have the proper function for getting aligned memory, so use it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 8 Mar 2011