Merge branch 'for-next/socfpga'

clk: socfpga: add arria10 clk drivers ...

Arria10 has a (slightly) different clock controller than the
Cyclone5. Add new drivers for it.

This driver only reads out the setup and builds the clocktree,
it does not setup any clocks.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: socfpga: move driver to subdirectory ...

Prepare for Arria10 clock driver.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX50 clock: add clock for USB physbase ...

Add the USB physbase clock entry for i.MX50 SoC to enable USB device
creation via DT.

Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/misc'

Merge branch 'for-next/mips'

clk: clk-gate-shared: fix "no previous prototype" warning ...

The patch fixes these compiler's warnings:

  drivers/clk/clk-gate-shared.c:72:13: warning: no previous prototype for 'clk_gate_shared_alloc' [-Wmissing-prototypes]
   struct clk *clk_gate_shared_alloc(const char *name, const char *parent, const char *companion,
               ^
  drivers/clk/clk-gate-shared.c:89:6: warning: no previous prototype for 'clk_gate_shared_free' [-Wmissing-prototypes]
   void clk_gate_shared_free(struct clk *clk)
        ^

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: No-op CLK_OF_DECLARE if not enabled ...

Instead of wrapping each defenition of CLK_OF_DECLARE hook with
preprocessor guards, change the definition of CLK_OF_DECLARE to expand
into no-op if COMMON_CLK_OF_PROVIDER is not enabled.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: at91: Port at91 DT clock code ...

Port at91 DT clock code from Linux 4.9-rc3.

Acked-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/imx'

Merge branch 'for-next/at91'

drivers: clk: clk-imx6.c: Don't gate LDB and IPUs ...

Depending on CONFIG_DRIVER_VIDEO_IMX_IPUV3 to decide whether to
gate IPU clocks or not is rather fragile. Any inadvertent
dependency on the IPU (like setting the NoC AQoS registers for
i.MX6QP) will result in a freeze if CONFIG_DRIVER_VIDEO_IMX_IPUV3
is disabled.

Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: Make COMMON_CLK_OF_PROVIDER depend on OFTREE ...

Make COMMON_CLK_OF_PROVIDER depend on OFTREE, this way checking for:

	defined(CONFIG_OFTREE) && defined(CONFIG_COMMON_CLK_OF_PROVIDER)

can be simplified to just:

	defined(CONFIG_COMMON_CLK_OF_PROVIDER)

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: Port two helper functions from Linux ...

Port of_clk_get_parent_count() and of_clk_parent_fill() from Linux.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: imx: clk-imx6ul: Use anatop_base pointer for consistency ...

The anatop_base pointer was unused, but instead of removing it, assign
and use it for readability like clk-imx6 and clk-imx6sx do.

Signed-off-by: Robin van der Gracht <robin@protonic.nl>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: imx: clk-imx6ul: Fixed conditional for enabling USB phy clocks ...

Signed-off-by: Robin van der Gracht <robin@protonic.nl>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: i.MX7: setup ethernet clocks ...

Reparent ethernet clocks so that they can be used by the
fec driver. The values are the same as U-Boot uses.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: i.MX7: do not register PLL bypass clocks as separate clocks ...

In the Kernel the bypass bits in the PLLs are now registered as
separate clocks and are no longer handled in the PLL code. In
barebox we haven't made this step and there currently seems to
be no reason to do so.
This means that the bypass bits are currently modified in both
the PLL driver and in the separate clocks which does not work
properly. Drop all the bypass clocks to let the bypass bits
be handled in the PLL driver exclusively.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: i.MX7: Fix ethernet clocks ...

The original clock code from Linux registers some gates at
base + 0x44e0, 0x44f0, 0x4500, 0x4510. These are not in the reference
manual and do not seem to have any effect on the hardware. The
reference manual lists clocks at 0x4700 and 0x4710 which Linux
does not control at all. These clocks really do have an effect on
the hardware and are needed for ethernet support. Register the
existing clocks rather than the made up clocks to support
ethernet.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: Add support for shared gates ...

Sometimes a single software control knob controls multiple gates
in hardware. This patch adds support for shared gates which help
coping this situation. The first gate is registered with the hardware
gate as usual, the others are registered as shared gates which does
not have hardware control itself, but only switches the real hardware
gate.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: i.MX7: do clock reparenting when all clocks are initialized ...

By the time the i.MX7 clock driver probes the fixed clocks which
are the roots of the clock tree are not yet present, so reparenting
especially to one of the fixed clocks does not work. Move the
tree setup to a later initcall when the fixed clocks are there.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: i.MX: Pass CLK_OPS_PARENT_ENABLE where necessary ...

CLK_OPS_PARENT_ENABLE was missing on some i.MX7 specific clocks.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: i.MX: clk-gate2: Allow to pass flags ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: implement CLK_OPS_PARENT_ENABLE ...

Some clocks may only be modified when their parent clocks are enabled.
The kernel has the CLK_OPS_PARENT_ENABLE flag for this purpose.
Implement it for barebox aswell.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: Keep enable count consistent over reparent ...

When reparenting a clock we have to make sure the new parent is enabled
when the clock was enabled on the old parent. Also we have to decrease
the old parents use counter when the clock was enabled.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM i.MX: Add i.MX6SL support ...

Most i.MX6SL infrastructure is already covered in barebox by general i.MX6
support. Missing infrastructure provided in separate commits are
* SoC type detection
* Clock infrastructure

Add the missing fsl,imx6sl-mmdc, so it will not be catched by fsl,imx6q-mmdc
and the remaining bits and pieces to provide barebox i.MX6SL SoC support.

Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX6SL: import clock infrastructure from linux ...

Import i.MX6SL clock infrastructure from linux clk-imx6sl.c

To save space, clocks beeing unlikely usefull for bootloader purposes
(SSI, SPDIF, EXTERN_AUDIO) were not imported.
Further, the fixup code from linux mainline commits
a49e6c4b8204 ("ARM: imx: add common clock support for fixup mux")
cbe7fc8aaeef ("ARM: imx: add common clock support for fixup div")
was ignored for this commit.

Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM i.MX31 clk: add pll_ref_clk and MCU PLL bypass select ...

The three MX31 PLL may be clocked from either CKIH or a frequency-multiplied
derivate of CKIL generated by the Frequency Pre Multiplier FPM.

Add the pll_ref_clk selection infrastructure and support for MCU PLL bypass
to support clock switching and boards not clocked CKIH.

Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: i.MX7: Add missing USB clocks ...

The USB clocks are missing in the Kernel clock code. Add them here.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: i.MX: Add clock support for i.MX7 ...

Signed-off-by Juergen Borleis <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>