ARM: boards: Makefile: fix whitespace ...

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

treewide: fix signedness mixups in printf format specifiers ...

This most likely doesn't fix any real bugs, but it's the
right thing to do and reduces the noise level with static
checkers.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: at91: add missing break ...

Otherwise SAM A5d35 would be detected as A5d36.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: dts: edmqmx6: add SPI SCLK pinmux ...

Otherwise reading or writing to the SPI flash doesn't
work.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/ppc'

Merge branch 'for-next/misc'

Merge branch 'for-next/imx-phyflex' ...

Conflicts:
	arch/arm/boards/phytec-phyflex-imx6/board.c

Merge branch 'for-next/imx'

Merge branch 'for-next/davinci'

Merge branch 'for-next/mips'

Merge branch 'for-next/imx-ipu-v3'

ARM: Phytec phyCORE i.MX35: Update defconfig ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX53 QSB: Remove wrong return ...

For a version 1.0 board the rest of loco_late_init should be executed
to completely configure the board.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX6 Sabrelite: Fix ethernet ...

The board code does a phy reset. This implicitly requests the phy reset
gpio. This gpio is also registered in the devicetree as phy reset gpio,
so the fec driver probe can't request the gpio and bails out with -EBUSY.
Fix this by freeing the phy reset gpio in the board code. While at it use
gpio_request_array for the gpios.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX6 Phytec phyFLEX: Add Nand update support ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX6: Add Nand boot bbu handler ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

MIPS: qemu-malta: add CBUS UART support ...

This patch adds CBUS UART dts support;
also it adds the necessary macros for DEBUG_LL.

qemu-malta supports three serial interfaces:

  * two ports are provided by the FDC37M817
    Super I/O; this chip is connected via LPC bus
    to Intel 82371EB (PIIX4E) South Bridge;

  * the third serial port is provided by
    the discrete TI 16C550C (CBUS UART);
    this chip is connected via CBUS directly
    to the board's GT64120 North Bridge.

See Malta User's Manual (MD00048) for details.

CBUS UART Instructions for use:

  1. Enable CONFIG_CONSOLE_ACTIVATE_ALL in .config
     (or disable uart0 in dts) and compile barebox;

  2. run qemu:

     qemu-system-mips -nographic -nodefaults \
        -monitor null -M malta -m 256 \
        -serial null -serial null -serial stdio \
        -bios barebox-flash-image

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ppc: P2020RDB: add environment partition support ...

Add an environment partition and support commands so that the system
configuration can be permanent.

Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: Panda: Fix board selection in panda defconfig files ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: at91: add sama5d36 SoC support ...

SAMA5D36 SoC is a sub type of SAMA5D3 which has two Ethernets

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

MIPS: rzx50: use short form for serial1 reference ...

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: update imx_v7_defconfig ...

- Enable loadenv command
- Enable mtd/NAND/UBI/UBIFS support
- Enable IPUv3 support
- Enable splash support

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM i.MX6q: Mark VPU and IPU AXI transfers as cacheable, increase IPU priority ...

This is needed so that the IPU framebuffer scanout cannot be
starved by VPU or GPU activity.
Some boards like the SabreLite and SabreSD seem to set this in
the DCD already, but the documented register reset values do not
contain the necessary settings.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

video: Add display timing from devicetree helper ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX6: Add video clocks ...

This adds the IPU, LVDS and HDMI clocks. As these are many, depend
on the IPU driver being compiled in.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: introduce clk parent rate changes ...

Let dividers and gates change the parent rates.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: clk-divider: pass flags to initializers ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: clk-fixed-factor: pass flags to initializers ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: clk-gate: pass flags to initializers ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clk: clk-mux: pass clk flags from initializers ...

struct clk has a flags field, let the clk-mux initializers set this
field.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>