sizes.h: move include/sizes.h to include/linux/sizes.h ...

This file originates in Linux.  Linux has it under include/linux/
directory since commit dccd2304cc90.
Let's move it to the same place as well in barebox.

This commit was generated by the following commands:

  find -name '*.[chS]' | xargs sed -i -e 's:<sizes.h>:<linux/sizes.h>:'
  git mv include/sizes.h include/linux/

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/resource-err-ptr'

ARM: mvebu: Add machine compatible to mbus ranges ...

Multi-SoC support for MVEBU will add mbus ranges for all compiled
SoCs. To protect the mbus node of the SoC barebox is executed on
from others ranges, pass machine's compatible to mvebu_mbus_add_range
and check before applying the fixup.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

resource: Let dev_request_mem_region return an error pointer ...

For all users fix or add the error check.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

resource: Let dev_get_mem_region return an error pointer ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

Merge branch 'for-next/marvell'

bus: mvebu: fix ranges fixup ...

The current fixup code is slightly wrong, and only works when the
root address cell number is one.

However, Armada XP has a root address cell number of two. In this case
we are currently applying the fixup on the child high base address,
while it should be applied on the child low base address.

Fix it and add some detailed explanation to avoid having to figure this
out each time.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

mtd: omap gpmc: fix bch8 nand-ecc-opt property ...

We interpret the ECC option "bch8" as OMAP_ECC_BCH8_CODE_HW, but the
Kernel uses OMAP_ECC_BCH8_CODE_HW_ROMCODE in this case instead. To make
the interpretation of the ti,nand-ecc-opt property compatible to the
Kernel we have to use OMAP_ECC_BCH8_CODE_HW_ROMCODE for "bch8"

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

bus: mvebu: fix resource size handling ...

A resource_size is defined as res->end - res->start + 1. Marvell
MBUS driver gets some ranges from DT as start and size but mis-calculates
end of range. This fixes 4 occurences of those mistakes.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mvebu: allow to fixup mbus ranges ...

On Marvell MVEBU SoCs internal registers are usually remapped from reset
default. While Dove and Kirkwood always had their registers remapped,
some Armada 370 and XP where shipped with bootloaders that did not remap
them.

On Barebox these registers are remapped early and on all MVEBU SoCs, so
provided DTs should always reflect that in their mbus ranges property.

This patch registers a fixup for DTBs and allows individual SoCs to add
specific remap ranges to the fixup list. The fixup is registered on
pure_initcall to even allow to fixup pbl or appended DTBs.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

bus: mvebu: add mbus driver ...

This imports the Marvell mbus driver from Linux. The mbus is the
main downstream bus found on all Marvell Orion SoCs. The driver
deals with re-configurable address windows which are currently
parsed from DT. Also enable the driver as default on all MVEBU
SoCs. While at it, also reorder drivers/bus/{Kconfig,Makefile}
alphabetically.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

bus: Add omap gpmc driver ...

This adds a devicetree-only driver for to configure the gpmc and its
child devices from dt. Currently only NAND is supported.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

bus: Add imx-weim support ...

Mostly taken from the kernel with support for other SoCs from
Alexander Shiyan.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Alexander Shiyan <shc_work@mail.ru>