LuminaSensum/barebox

Fork: 0

LuminaSensum / barebox

History for barebox / drivers / pci

2015-05-01	cbc2492 Browse files » PCI: fill in bus primary field ... This was erroneously left uninitialzed as nothing was using it. The i.MX6 PCI driver needs this to be filled properly to decide if a config space access is allowed for a specific devfn. This fixes PCI enumeration on the Gateworks GW54xx board. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Lucas Stach authored on 29 Apr 2015 Sascha Hauer committed on 1 May 2015
2015-05-01	2a8bc95 Browse files » PCI: register and active bridge device before proceeding to scan ... The bridge device needs to be registered and activated before the scanning can proceed, as the bridge is the parent for other devices. This fixes a NULL ptr derefernce when scanning PCI hierarchies with bridges behind bridges. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Lucas Stach authored on 29 Apr 2015 Sascha Hauer committed on 1 May 2015
2015-04-13	9c4cf7d Browse files » Merge branch 'for-next/pci' Sascha Hauer committed on 13 Apr 2015
	4e1ac4a Browse files » Merge branch 'for-next/driver' Sascha Hauer committed on 13 Apr 2015
	da440ab Browse files » pci: make sure to activate devices on the root bus ... Commit b8a1bb1dd215 (pci: defer device registration until after bridge setup) changed the activation order of devices, so that bridges above the devices could be configured properly before activating the devices below. This commit failed to acknowledge that there may be devices located directly on the root bus without any bridge in between and so those devices would never get enabled. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Lucas Stach authored on 3 Apr 2015 Sascha Hauer committed on 13 Apr 2015
2015-03-17	f929fab Browse files » pci: Add i.MX6 pcie support ... Based on the corresponding kernel driver with changes to make it work on barebox. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 17 Mar 2015
	467bc67 Browse files » pci: Add pcie-designware driver ... Based on the corresponding kernel driver, only small changes to make it work on barebox. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 17 Mar 2015
	9a21cc1 Browse files » pci: fix copy-paste bug ... Test for the correct resource before derefencing it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 17 Mar 2015
	90b6f60 Browse files » pci: Use standard pr_debug ... Use pr_debug instead of custom DBG macro. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 17 Mar 2015
	e0899df Browse files » driver: Call remove function only when available ... The bus implementations currently call the drivers remove hook unconditionally, but this hook is seldomly populated. Only call it when it's actually populated. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha Hauer committed on 17 Mar 2015
2015-03-16	eab9e4c Browse files » PCI: fix bad bugs in bridge setup code ... Add the required brackets, so that we don't write unused registers with potentially bogus values. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Lucas Stach authored on 13 Mar 2015 Sascha Hauer committed on 16 Mar 2015
2015-01-08	d875357 Browse files » sizes.h: move include/sizes.h to include/linux/sizes.h ... This file originates in Linux. Linux has it under include/linux/ directory since commit dccd2304cc90. Let's move it to the same place as well in barebox. This commit was generated by the following commands: find -name '*.[chS]' \| xargs sed -i -e 's:<sizes.h>:<linux/sizes.h>:' git mv include/sizes.h include/linux/ Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Masahiro Yamada authored on 8 Jan 2015 Sascha Hauer committed on 8 Jan 2015
2014-11-17	16018ed Browse files » pci: tegra: relax link-up timeout ... Some devices need a considerable amount of time from reset deassertion until they are ready to establish a link. Relaxing the link-up timeout helps to detect them more reliable. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Lucas Stach authored on 12 Nov 2014 Sascha Hauer committed on 17 Nov 2014
	81e3bac Browse files » pci: align bridge windows ... The bridge filtering logic needs a minimum alignment of 1MB for mem and 4KB for io resources. Take this into account while assigning resources to devices in oredr to not produce overlapping windows between different bridges. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Lucas Stach authored on 12 Nov 2014 Sascha Hauer committed on 17 Nov 2014
	cc90265 Browse files » pci: correct BAR size calculation ... The previous math would return negative sizes for some BARs. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Lucas Stach authored on 12 Nov 2014 Sascha Hauer committed on 17 Nov 2014
2014-11-10	edbd3a6 Browse files » pci: mvebu: Fix uninitialized variable in mvebu_get_target_attr() ... This is the same fix that was applied to the Linux kernel in commit 56fab6e18944 (PCI: mvebu: Fix uninitialized variable in mvebu_get_tgt_attr()). Fixes: 5a9ba98 ("pci: mvebu: Add PCIe driver") Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Thomas Petazzoni authored on 9 Nov 2014 Sascha Hauer committed on 10 Nov 2014
2014-11-04	af7c753 Browse files » pci: tegra: add tegra124 support ... Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Lucas Stach authored on 2 Nov 2014 Sascha Hauer committed on 4 Nov 2014
2014-10-08	18ff087 Browse files » pci: add Tegra host controller driver ... Only tested on Tegra30 for now. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Lucas Stach authored on 4 Oct 2014 Sascha Hauer committed on 8 Oct 2014
	490d4fe Browse files » pci: track parent<->child relationship ... So that PCI devices hang down from bridges and root bridges down from the PCI host controller when calling devinfo. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Lucas Stach authored on 4 Oct 2014 Sascha Hauer committed on 8 Oct 2014
	48f88df Browse files » pci: prettyprint device names ... Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Lucas Stach authored on 4 Oct 2014 Sascha Hauer committed on 8 Oct 2014
	b8a1bb1 Browse files » pci: defer device registration until after bridge setup ... Otherwise the drivers for a device may probe before the devices parent bridge is fully configured, which leads to errors when accessing the BARs. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Lucas Stach authored on 4 Oct 2014 Sascha Hauer committed on 8 Oct 2014
	687ceb7 Browse files » pci: setup bridges and traverse buses behind them ... Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Lucas Stach authored on 4 Oct 2014 Sascha Hauer committed on 8 Oct 2014
	beb6469 Browse files » pci: properly populate prefetchable BARs ... Some host controllers provide a prefetchable memory area and devices will prefer this for some of their BARs. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Lucas Stach authored on 4 Oct 2014 Sascha Hauer committed on 8 Oct 2014
	06ac5b5 Browse files » pci: add resource enum ... Makes things way clearer than juggling numbers. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Lucas Stach authored on 4 Oct 2014 Sascha Hauer committed on 8 Oct 2014
	72d9846 Browse files » pci: split out device init ... To make it reusable and the code more readable. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Lucas Stach authored on 4 Oct 2014 Sascha Hauer committed on 8 Oct 2014
2014-07-31	5a9ba98 Browse files » pci: mvebu: Add PCIe driver ... This adds a PCI driver for the controllers found on Marvell MVEBU SoCs. Besides the functional driver itself, it also adds SoC specific PHY setup required for PCIe. Currently, only Armada 370 is fully supported. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sebastian Hesselbarth authored on 30 Jul 2014 Sascha Hauer committed on 31 Jul 2014
	916ca94 Browse files » pci: set auto-incremented bus number ... When using more than one PCI bus, we have to assign unique numbers to each bus. Use an auto-incremented bus index and assign it to each registered bus. Also, allow the PCI host controller to update internal registers by calling set_busno with assigned bus number. While at it, add pci_controller struct to set_busno callback, add a back reference to pci_controller to pci_bus, and clean up unused left-overs from Linux import. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sebastian Hesselbarth authored on 30 Jul 2014 Sascha Hauer committed on 31 Jul 2014
	e5a91ee Browse files » pci: ensure device does ignore BAR mangling ... Disable access to PCI devices I/O and memory regions while mangling BAR registers. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sebastian Hesselbarth authored on 30 Jul 2014 Sascha Hauer committed on 31 Jul 2014
	166a6ba Browse files » pci: register device after BAR setup ... As soon as pci_register_device is called, a potential driver will access its registers. This requires BARs to be set up properly, so move pci_register_device after BAR setup. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sebastian Hesselbarth authored on 30 Jul 2014 Sascha Hauer committed on 31 Jul 2014
	b7ffe9a Browse files » pci: pci_scan_bus: respect 64b BARs ... In PCI 64-bit BARs span two 32-bit BARs, therefore if BAR type indicates a 64-bit BAR we have to skip the next BAR register. While at it, also set proper IORESOURCE flags for I/O and 32b MEM. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Sebastian Hesselbarth authored on 30 Jul 2014 Sascha Hauer committed on 31 Jul 2014