ARM: calculate compressed dtb len correctly ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

socfpga: Initialize emac physels to RGMII correctly ...

A comment in the socfpga init said that it was "Clearing emac0 PHY
interface select to 0", but this was doubly incorrect.  It was setting
physel for emac1, not emac0, and it was setting physel to 1 (RGMII)
not 0 (GMII).  All supported socfpga boards use RGMII, and use emac1,
so fix the comment to reflect the code.  But then extend the code to
set the physel for both emac0 and emac1, so it can work on boards that
use either or both emacs (which are called gmac0/1 in the dts).

The Cyclone V datasheet, page 17-60 "EMAC HPS Interface
Initialization", says to set physel while the EMAC is in reset.  So
place the EMAC in reset while changing physel.  The emacs are not in
reset as code earlier in the boot has already taken most of the
modules out of reset.  So put them back in reset while the physel is
changed.  The Linux kernel does it this way too.

If barebox has no network support, there is not much point in
configuring the emac physel lines.  This would be the case for the
xloader pre-bootloader config, which configures physel, doesn't use
the network, loads the main barebox, which then reconfigures physel
again.  Make this code depend on CONFIG_NET so it's just done in the
main barebox.  The Linux kernel does not need barebox to do this
initialization to use networking.

Signed-off-by: Trent Piepho <tpiepho@kymetacorp.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: imx6dl: Add support for Phytec phyCORE-i.MX6 SOM ...

Add Phytec phyCORE-i.MX6 SOM.
     - imx6dl-phytec-phycore-som-nand
        - 256GB RAM on 1 Bank with 32Bit
        - 10/100MBit Ethernet
        - NAND
        - SD
        - UART

Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

MIPS: allow user to pass incorrect address to md command ...

This commit makes it possible to handle exception on
incorrect data access so 'md' command just show 'xxxxxxxx'
instead of crashing the system.

    barebox:/ md -l 0xa0000003+4
    a0000003: xxxxxxxx                                           ....

Without this commit we will get this

    barebox:/ md -l 0xa0000003+4
    a0000003:
    Ooops, address error on load or ifetch!

    ...

    ### ERROR ### Please RESET the board ###

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

MIPS: import exception registers restoring macros from linux kernel ...

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

MIPS: avoid excessive exception ...

This commit clears ERL (ERror Level) flag on start.
If this flag is set then we get 'TLB miss on load or ifetch'
just after return from exception.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

MIPS: traps.c: separate registers print stuff to show_regs() ...

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: omap: Use correct device to mount on /boot ...

The current code tests if a partition (i.e. disk0.0) exists and instead
of mounting boot from this partition it uses the whole device (disk0).
This only works because the the FAT code accepts a MBR as input and
automatically skips it.

Let the code use the partition to mount /boot instead as it was
intended. We don't have to stat() the partition device, since this
error will be caught by mount() anyway, so remove the unnecessary
stat().

Reported-by: Peter Mamonov <pmamonov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: don't let the unwinder depend on exception handling ...

To be able to use dump_stack() without support exception handling the
definition of dump_stack has to move to a file that is actually compiled
without ARM_EXCEPTIONS.

Fixes: d332597c7c16 ("ARM: make exception handling optional")
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: imx6q: Add support for Phytec phyCORE-i.MX6 SOM ...

Add Phytec phyCORE-i.MX6 SOM.
    Support:
     - imx6q-phytec-phycore-som-nand:
        - 1GB RAM on 1 Bank with 64Bit
        - 1GBit Ethernet
        - SPI NOR
        - NAND
        - SD
        - UART

     - imx6q-phytec-phycore-som-emmc
        - 1GB RAM on 1 Bank with 64Bit
        - 1GBit Ethernet
        - SPI NOR
        - eMMC
        - SD
        - UART

Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: imx6q: pfla02: add phyFLEX-i.MX6 DualLite 1GiB on one bank ...

Add support for phyFLEX-i.MX6 DualLite 1GiB on one bank with NOR.

Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: imx6dl: pfla02: Add support for 128MB and 256MB RAM ...

Add support for phyFLEX-i.MX6 Solo with 128MB and 256MB RAM on one
memory bank.

Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: imx6q: pfla02: Add support for 512MiB RAM on one bank ...

Add support for phyFLEX-i.MX6 Quad 512MiB RAM on one bank.

Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: pfla02: append suffix 1bank ...

In the current naming schema the phyFLEX-i.MX6 variants which only use
one bank for memory have the suffix "1bank". The variants which use two
banks of memory have no suffix.

The patch fixes the name of the phyFLEX-i.MX6 Solo variant with 512MiB
on one bank. So the name of the image file changes from
    barebox-phytec-pbab01s-512mb.img
    barebox-phytec-phyboard-subra-512mb.img
to
    barebox-phytec-pbab01s-512mb-1bank.img
    barebox-phytec-phyboard-subra-512mb-1bank.img

This patch touches the phyFLEX-i.MX6 Kit variant and the
phyBOARD-SUBRA-i.MX6 which shares the same phyFLEX-i.MX6 module.

Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: phytec-som-imx6: update environment ...

Rename sd-ext3 to mmc, remove filesystem type from bootargs and remove
bootargs-ip. Add init script 'bootsource' to set boot source priority
and bootscript 'spi' for SPI NOR.

Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: phytec-som-imx6: set loadaddr to start of DDR memory. ...

The loadaddr in the flash-headers for the phyFLEX/phyCARD-i.MX6 was set
to 0x20000000 (512MiB). The start of the DDR memory in CPU's memory map
is 0x10000000 (256MiB). So the ROM loader loads the barebox image at the
memory position 256MiB and higher in the DDR memory.

This is a problem when the module doesn't have more than 256MiB of
memory. Therefore the loadaddr is set to the start of the DDR memory.

The patch was tested on a phyFLEX-i.MX6 Quad with 1GiB RAM on one bank
and on a phyCARD-i.MX6 Quad 1GiB RAM on two banks.

Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

boards: Add phytec-som-imx6 ...

The main idea behind this patch is to avoid redundant code.  Because of
the module similarities of all i.MX6 based phytec boards, we can merge
its code.

The phytec-som-imx6 merges the code of all i.MX6 based phytec SOMs.  So
we will have only one "board" in the barebox for phyCARD-i.MX6 and
phyFLEX-i.MX6.

Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: imx6: phycard: use numeric suffix in device tree ...

Use numeric suffix for 'environment-sd3' in device tree.  This patch
prepares phytec-phycard-imx6 for the SOM unification.

Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: microsom: get MAC address from fuses ...

The production models have the MAC fuses blown, so we can use a
real MAC address instead of a random one.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: microsom: make ETH work on production modules ...

The pre-production modules had an external crystal to generate the PHY
reference clock. Production modules rely on the i.MX6 to output the
correct clock.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: microsom: add full set of module variants on Hummingboard ...

Now that we have a full set of DRAM configuration entries we can
build images for the full set of modules on Hummingboard.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: microsom: import DCD from SolidRun U-Boot ...

This is a complete set of DRAM configuration values for all of the
MicroSOM variants extracted from SolidRun U-Boot.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: microsom: change barebox image name for Hummingboard ...

To reflect that the current image is in fact for a combination of a
MicroSOM i1 with a Hummingboard baseboard.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: microsom: delete cargo-cult from Makefile ...

No need to carry this cruft around. It's not needed anymore.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: imx6: add MMDC arbitration control register define ...

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/mvebu'

Merge branch 'for-next/misc'

Merge branch 'for-next/mips'

Merge branch 'for-next/memtest'

Merge branch 'for-next/imx'