ARM: i.MX53: ccxmx53: Fix memory detection. ...

This patch fixes memory detection on the Digi ccxmx53 board.
Also updates dts to support nand.
Cleaned up whitespace?

Signed-off-by: Jason Cobham <cobham.jason@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

fix erasing/protecting flashes with unspecified size ...

fixes: 81737c1 mtd: Fix erasing of devices >4GiB

Several places erased a complete flash partition passing ~0 as count to
erase(). With the above commit count to erase was changed from an unsigned
type to a signed type, so the (count > f->size - offset) check in
erase() no longer triggers and the ~0 count is no longer adjusted to the whole
device size. Among other things this results in saveenv failures on NOR
flashes.
This patch fixes this by introducing an explicit macro for erasing the
whole device which is tested for in erase(). All other negative values
are rejected.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reported-by: Giorgio <giorgio.nicole@arcor.de>

ARM: tegra: set up stack before calling maincluster entry ...

Allows this code to work correct regardless of the used compiler
optimizations.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/ubifs'

Merge branch 'for-next/imx'

Merge branch 'for-next/arm'

ARM: Add atomic.h from u-boot v2016.03 ...

atomic-long.h:
* Replace __UBOOT__ with __BAREBOX__

Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PPC: atomic: remove non existing header include ...

linux/config.h does not exist. Remove its inclusion.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

PPC: discard unused functions ...

Use --gc-sections to discard unused functions. This makes the image
smaller.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX27: Fix gpt compatible for latest device trees ...

In v4.2-rc3 the "fsl,imx1-gpt" compatible was replaced with
"fsl,imx21-gpt" so i.MX27 currently ends up without clocksource. Fix
this.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

efi: let the generic relocate code handle all relocations ...

Part of the barebox code and variables are put in separate sections
(.barebox* and .initcall*). When this code is compiled as position
independent code then the compiler creates corresponding .rela.barebox* and
.rela.initcall* sections with the relocation table entries.
These sections don't match the .rela.data* wildcard in the linker script.
As a result, they are not added to the .rela section during linking but are
added individually after it instead. And when the EFI binary is created
from the ELF binary, these sections are not copied.
This has two side effects:

1. The corresponding relocations are not handled by the generic relocation
code. 'fixup_tables()' was added to do these relocations manually.

2. In the DYNAMIC section, the RELASZ entry contains the total size of
relocations in bytes. This includes the .rela.barebox* and .rela.initcall*
sections. This value is not modified when the EFI binary is created. So the
value is too large.
The generic relocation code in _relocate() used this value when iterating
over all relocation entries. With the wrong RELASZ value it iterates beyond
the end of the .rela section into uninitialized memory. After power-on this
memory is zero and the relocation code interprets this as 'nothing to do',
so there is no visible effect. After a soft reset, random data in that area
may produce a seemingly valid relocation entry, a random address is
modified and barebox crashes.

This patch adds the .rela.barebox* and .rela.initcall* sections to the
normal .rela section. The RELASZ now contains the correct size and the
generic relocation code works correctly. 'fixup_tables()' must be removed
at the same time to avoid relocating these entries twice.

Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: xload-esdhc: Find entry in image ...

The binary image generated by barebox contains an instruction at the
very beginning to jump over the header. However, when the image is
written to a SD card and the first 512 bytes are skipped in order to
preserve the partition table then this jump instruction is lost. Instead
of relying on the jump instruction at the image beginning calculate
the image entry from the i.MX header instead of relying on the beginning
of the image being the entry point.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: xload-esdhc: Add debug messages ...

When imx6_esdhc_start_image fails print an error, otherwise print a
success message.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: xload-esdhc: Fix typo successul -> successful ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: xload-esdhc: Add GPL header ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: remove unused imx-flash-header.h ...

All i.MX images are nowadays built with the imx-image tool, so we do not
need the header files and Kconfig options anymore. Remove them.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX6: esdctl: Fix CS0_end for 4GiB/cs ...

On i.MX6 a single chipselect can have 4GiB. In this case the calculation
for CS0_end overflows the 7 bit field. Clamp it to 127, the maximum
supported value.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX6: esdctl: Fix memsize calculation for 4GiB/cs ...

On i.MX6 a single chipselect can have 4GiB, which overflows a 32bit
type, so imx6_mmdc_sdram_size() must return a u64 to support this case.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: Rework vector table setup ...

The current vector table setup has some shortcomings. First of all
currently the case when the high vectors are inside SDRAM (that is,
SDRAM reaches the end of the address space) is not supported. In this
case we create a secondary page table for the section containing the
vectors which gets overwritten by the general SDRAM secondary page
table entries creation afterwards. On ARMv7 and later the exception
table setup can be improved: Here the vector table address is configurable
in the VBAR register. We can use this register to skip remapping the
vector table.

With this patch we first try to use the VBAR register before doing
something else. Also, when we have to use the high vectors we first
try a request_sdram_region to test if the vector table memory is already
mapped. While at it sprinkle some comments into the code.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: Do not use last 64KiB of address space for barebox ...

The last 64KiB of address space may be used for the vector table at
0xffff0000, so we cannot use it for barebox. The easiest way to archieve
this is to never use the last 64KiB of memory.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: start: Fix wrong format specifier ...

Print a hex number after 0x, not a decimal number.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: pbl-multi: Fix SDRAM at end of address space ...

When SDRAM reaches to the end of the address space the comparison
membase + memsize evaluates to 0, so pc - membase < memsize can never
be true. Fix this by substracting membase on both sides of the
comparison.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM i.MX35: Read reset source from CCM ...

CCM has reset status bits with more detailed information than the
watchdog. Set reset source with higher priority.

Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

i.MX6: PL310: Adjust settings for performance ...

According to commit f6b6f3c from
git://git.freescale.com/imx/uboot-imx.git:

	Also set Prefetch offset to 15, since it improves
	memcpy performance by 35%. Don't enable Incr double
	Linefill enable since it adversely affects memcpy
	performance by about 32MB/s and reads by 90MB/s. Tested
	with 4K to 16MB sized src and dst aligned buffer.

This commit ports those chagnes from U-Boot.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

i.MX6: Apply PL310 errata base on PL310's revision ...

I.MX6Q Plus parts have r3p2 revision of PL310 so double linefill
errata no longer applies for all of the i.MX6Q SoCs. Change the code to
use PL310's revision inforation to determine if workaround needs to be
applied.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

L2x0: i.MX6: Replace magic numbers with constants ...

Use constants instead of magic numbers for PL301 registers bits in
imx6_mmu_init()

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

i.MX6: Apply errata 845369 workaround ...

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: Add errata 845369 workaround ...

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

i.MX: Add revision detection for i.MX6D/Q Plus ...

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX27: Fix gpt compatible for latest device trees ...

In v4.2-rc3 the "fsl,imx1-gpt" compatible was replaced with
"fsl,imx21-gpt" so i.MX27 currently ends up without clocksource. Fix
this.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>