Merge branch 'for-next/mvebu'

Merge branch 'for-next/imx'

Merge branch 'for-next/arm'

ARM: socfpga: remove unused fpgaintf setup ...

The disable bits for the ethernet interfaces between FPGA and HPS are read
and configured, but never written back.
The configuration itself doesn't make that much sense however. So instead of
writing it back to the register, remove the whole read-modify operation altogether.

Reported-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

arm: boards: phytec-som-am335x: Update boot scripts ...

Expand the boot scripts by eMMC and clean them up.
Add NV variable files and removed unnecessary kernel bootargs from the
boot scripts.
Add "rootflags='data=journal'" bootarg to SD card boot script.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: omap: Fix error printing ...

Presumably the code wanted to print the error with the %d format
specifier. Actually pass the error code by using PTR_ERR() and not
IS_ERR(). While at it use %ld to print a unsigned long variable to
get rid of a compiler warning.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: omap: phytec-phycore-omap4460: Fix compiler warning ...

Use IS_ENABLED() rather than #ifdef to get rid of unused variable
warning.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: dts: i.MX6: fix usdhc3 pinmuxing on tqma6x ...

The usdhc3 pin group wrongly referred the SD4 pads instead of the SD3 pads.
This leads to issues when muxing the SD4_CMD and SD4_CLK pads for uart3.

This regression was introduced by code refactoring in commit a5207a6 ("ARM:
dts: i.MX6: drop usage of pin group defines").

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: Update zii_vf610_dev_defconfig ...

Update zii_vf610_dev_defconfig to add needed and remove unused
features.

Signed-off-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mvebu: Add initial support for Turris Omnia ...

Up to now only 2nd stage booting is tested and boots up to a prompt.
i2c and spi are working, ethernet, usb and sata don't.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mvebu: initial support for Armada 38x ...

This SoC is similar enough to Armada 380/XP to make use of the code
supporting these without further adaption.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/state'

Merge branch 'for-next/misd'

Merge branch 'for-next/mips'

Merge branch 'for-next/imx'

Merge branch 'for-next/arm'

Revert "globalvar: make globalvar functions more consistent" ...

This reverts commit 1b4a05c.

ARM: i.MX6 Wandboard: enable Wandboard Quad ...

Extend the DT compatibility check to actually use the Wandboard Quad.

Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX6 Wandboard Quad: fix PBL UART MUX ...

Three variants of the Wandboard exist: WBSOLO, WBDUAL and WBQUAD.
For all variants, the external serial port is connected to UART1 via
PAD_CSI0_DATA10 (TX) and PAD_CSI0_DATA11 (RX). Unfortunately, the IOMUX
register adresses for this mux differ between i.MX6Q (WBQUAD) and others.
Make the UART IOMUX for PBL compatible for WBQUAD.

Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX6 Wandboard: dont do MMDC Write Leveling Calibration ...

The hardware requirements to perform a write leveling calibration are
not fulfilled by the Wandboard modules.
IMX6DQRM §44.11.6 "Write leveling Calibration" Note2 states that the first
bit of each data byte group (D0, D8, ..., D56) from memory must be connected
to the same data bus bit on the controller, which is not given on the
Wandboard modules, resulting in unpredictable calib results and breaking the
WBQUAD 2GiB SDRAM setup. Similar restrictions exist for the i.MX6SD.

Remove this calibration and use the MPWLDECTRL defaults.

Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: mvebu: fix size mask for RAM window ...

The size field in the window control register occupies bits 31:16. So
adapt ARMADA_370_XP_DDR_SIZE_MASK accordingly. This fixes detection of
RAM chips smaller than 32 MiB and so probably doesn't affect any
supported machine.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX6: add Technexion Pico Hobbit support ...

This adds support for the i.MX6UL Technexion Pico Hobbit. The board
comes with different amounts of RAM. We create one image for the 256MB
and one for the 512MB variant.

Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
   ---
   v1 -> v2: - removed already prepared clock setup
   v2 -> v3: - added phy-reset-post-delay as the support is now available

Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: phytec-som-imx6: remove needles enet refclk setup ...

All REF_CLK output setup now is generically prepared for imx6ul. The
handling of the ENET_CLK_SEL (gpr[13]|gpr[14]) bits is not necessary, as
0 is their reset value.

Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: setup ENET_TX_CLK_DIR in imx6_init for every imx6ul ...

We generically enable the output of ENET_TX_CLK.
It will be output if ENET_REF_CLK is selected.

Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

sandbox: new --stdinout option to enable a bidirectional console ...

In addition to allowing read-only and write-only consoles with --stdin
and --stdout, we now allow bidirectional read/write consoles with FIFO
files. This is e.g. to allow doing RATP over the FIFO based consoles.

Signed-off-by: Aleksander Morgado <aleksander@aleksander.es>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

sandbox: Fix registering file/fifo consoles ...

barebox_register_console() uses xzalloc which requires the malloc pool
to be initialized, so call it during the second option parsing when
this is already done.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

sandbox: fix registering multiple consoles ...

Consoles need to be registered with the "console" device name so that
they are probed by the correct driver. The barebox_register_console()
was already forcing this as it was overwriting the name that was being
passed as argument, but it was failing to provide a unique id for
each new console, so the underlying register_device() would just
return an error when wanting to re-register a device with device name
"console" and id 0.

We remove the unused name parameter from barebox_register_console() as
it is really nowhere used, and also specify DEVICE_ID_DYNAMIC as id,
so that a new unique device id is given to each newly registered
console device.

Signed-off-by: Aleksander Morgado <aleksander@aleksander.es>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: imx6: gw54xx: use wdog1 for barebox ...

As Barebox isn't changing the external PMIC power rails the internal
watchdog reset is fine for the Barebox reset purposes. Watchdog 2 is
only usable on boards with revision E or later, as this on is incapable
of executing an internal reset.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: imx6: gw54xx: fixup watchdog nodes on pre rev E boards ...

Older boards before revision E don't have the external watchdog signal
wired up to the PMIC, so they must use watchdog 1, which is able to
reset the SoC internally.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: imx6: gw54xx: add function to retrieve board revision from GSC ...

This parses the board revision from the GSC EEPROm model string.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>