ARM: i.MX: Add ZII SCU2 Mezz Board ...

Add ZII SCU2 Mezz Board. Which is a i.MX51 based board that is similar
enough to RDU1 that they both can be handled by a single
image (type can be detected at runtime).

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: zii-vf610-dev: Convert SPU3 to use upstream DTS ...

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: zii-vf610-dev: Convert CFU1 to use upstream DTS ...

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: boot: Detect boot instance on i.MX51 ...

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: boot: Make use of FIELD_GET() in imx51_get_boot_source() ...

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: rdu1: Switch MMC BBU to use boot partitions ...

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: rdu1: Change BBU names to match RDU2 ...

Change BBU names to match RDU2 and the rest of ZII boards.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: rdu2: Switch MMC BBU to use boot partitions ...

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: zii-vf610-dev: Switch MMC BBU to use boot partitions ...

Convert SPU3 to use MMC boot partitions as well as extend the initcall
to cover CFU1 which can support this feature as well.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

dts: VFxxx: Add aliases for ESDHC controllers ...

Add aliases for ESDHC controllers in order to make their naming across
Vybrid and i.MX.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: VFxxx: bbu: Add a handler for MMC boot partitions ...

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: bbu: Detect MMC before reading current boot partition ...

In order to be able to read "mmcN.boot" we need to detect that device
first. Not doing so would result in failure if "barebox_update" is
executed before "detect mmc0".

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: bbu: Convert devicefile to device name ...

Data->devicefile can contain absolute path to target device, so we
need to convert it to a device name before we can safely use it.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: bbu: Check retrun value of getenv() ...

Add code to make sure that getenv() returned correct result and bail
out if it failed.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX51: bbu: Add a handler for MMC boot partitions ...

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: bbu: Add support for v1 header to MMC boot handler ...

Convert imx_bbu_internal_v2_mmcboot_update() to use imx_bbu_update()
for actual update in order to be able to support v1 as well as v2
headers. While at it rename the function to
imx_bbu_internal_mmcboot_update() to reflect that change.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX27: Fix NAND boot with newer gcc ...

This is a fix for a very weird icache problem when booting from NAND.
With a OSELAS-2018.01 toolchain imx27_barebox_boot_nand_external() is
compiled like this:

0000063c <imx27_barebox_boot_nand_external>:
     63c:	e92d4010 	push	{r4, lr}
     640:	e1a0200f 	mov	r2, pc
     644:	e282230a 	add	r2, r2, #671088640	; 0x28000000
     648:	e3520b02 	cmp	r2, #2048	; 0x800
     64c:	9a000012 	bls	69c <imx27_barebox_boot_nand_external+0x60>
     650:	eb000034 	bl	728 <imx27_barebox_entry>
     654:	e592c000 	ldr	ip, [r2]
     658:	e2822004 	add	r2, r2, #4
     65c:	e580c000 	str	ip, [r0]
     660:	e1520001 	cmp	r2, r1
     664:	e2820332 	add	r0, r2, #-939524096	; 0xc8000000
     668:	1afffff9 	bne	654 <imx27_barebox_boot_nand_external+0x18>
     66c:	e1a00003 	mov	r0, r3
     670:	e59f2034 	ldr	r2, [pc, #52]	; 6ac <imx27_barebox_boot_nand_external+0x70>
     674:	e2401376 	sub	r1, r0, #-671088639	; 0xd8000001
     678:	e59f3030 	ldr	r3, [pc, #48]	; 6b0 <imx27_barebox_boot_nand_external+0x74>
     67c:	e1510002 	cmp	r1, r2
     680:	93c004ff 	bicls	r0, r0, #-16777216	; 0xff000000
     684:	e1a03a83 	lsl	r3, r3, #21
     688:	e1a03aa3 	lsr	r3, r3, #21
     68c:	93c0073e 	bicls	r0, r0, #16252928	; 0xf80000
     690:	e283320a 	add	r3, r3, #-1610612736	; 0xa0000000
     694:	9280020a 	addls	r0, r0, #-1610612736	; 0xa0000000
     698:	e12fff33 	blx	r3
     69c:	e1a03000 	mov	r3, r0
     6a0:	e3a02336 	mov	r2, #-671088640	; 0xd8000000
     6a4:	e59f1008 	ldr	r1, [pc, #8]	; 6b4 <imx27_barebox_boot_nand_external+0x78>
     6a8:	eaffffec 	b	660 <imx27_barebox_boot_nand_external+0x24>
     6ac:	0007fffe 	.word	0x0007fffe
     6b0:	00000604 	.word	0x00000604
     6b4:	d8000800 	.word	0xd8000800

From 0x64c the code jumps to 0x69c and then back to 0x660. The jump to
0x69c triggers a icache line fetch which works fine, but then when the
function continues and the code enters the same instruction cache line
at 0x680 again then only garbage is executed, most of the time we end up
in an endless loop and the CPU jumps back somewhere at the beginning of
the function.

I have carefully added nops right before the out of line code block.
When there are enough nops to move the block to the next cache line
then the code works again.

That of course is no solution to the problem. Since I am out of ideas
what the real issue is let's just disable the icache in this function
and re-enable it in the next function. This seems to solve the problem.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Florian Bäuerle <florian.baeuerle@allegion.com>

ARM: radxa-rock: Fix passing device tree to kernel ...

The device tree can be passed in global.bootm.oftree. This used to
be "oftree -f" / "oftree -l" which no longer works.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: omap: xload: Fix network boot filename ...

The dhcp code no longer exports the "bootfile" environment variable.
It now uses global.dhcp.bootfile. Since global variable support is
not necessarily part of the MLO we instead use struct dhcp_result *
to get the bootfile information.

Fixes: 528298b702 ("net: dhcp: rework")

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Dennis Menschel <menschel-d@posteo.de>

MIPS: fix PCI quirk infrastructure build ...

The commit fc2c618c2038 ("pci: add quirk infrastructure")
adds necessary ld-script changes only for ARM architecture.
As a result, qemu-malta build fails:

     LD      barebox
    drivers/built-in.o: In function `pci_fixup_device':
    (.text.pci_fixup_device+0x30): undefined reference to `__end_pci_fixups_enable'
    (.text.pci_fixup_device+0x38): undefined reference to `__end_pci_fixups_enable'
    (.text.pci_fixup_device+0x34): undefined reference to `__start_pci_fixups_enable'
    (.text.pci_fixup_device+0x3c): undefined reference to `__start_pci_fixups_enable'
    (.text.pci_fixup_device+0x70): undefined reference to `__end_pci_fixups_header'
    (.text.pci_fixup_device+0x78): undefined reference to `__end_pci_fixups_header'
    (.text.pci_fixup_device+0x74): undefined reference to `__start_pci_fixups_header'
    (.text.pci_fixup_device+0x80): undefined reference to `__start_pci_fixups_header'
    (.text.pci_fixup_device+0x2c): undefined reference to `__end_pci_fixups_early'
    (.text.pci_fixup_device+0x88): undefined reference to `__end_pci_fixups_early'
    (.text.pci_fixup_device+0x84): undefined reference to `__start_pci_fixups_early'
    (.text.pci_fixup_device+0x90): undefined reference to `__start_pci_fixups_early'
    make: *** [Makefile:767: barebox] Error 1

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: Multi PBL: Fix image calculation for certain toolchains ...

The current way to calculate the compressed image position works
with the OSELAS toolchains, but not with the Debian/Ubuntu toolchains.
For these toolchains &image_end_marker already returns the correct
address, adding global_variable_offset() to it is wrong.

The solution seems to be to put the image_end_marker into a different
object file so that the compiler cannot play any tricks to resolve
the address internally in the object file.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/net'

Merge branch 'for-next/mxs'

Merge branch 'for-next/imx-hab'

Merge branch 'for-next/imx'

Merge branch 'for-next/dts'

Merge branch 'for-next/arm'

Merge branch 'for-next/am335x'

dts: update to v4.19-rc1 ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: make HAB certificate pathes explicitly overwritable ...

When building HAB images for i.MX we have to specify some pathes to
the certificates. This can be done with Kconfig variables. For better
build system integration we also want to be able to specify the pathes
in environment variables. This currently doesn't work as we specify
the variables from the environment with the -D option to cpp, but also
include generated/autoconf.h which overwrites the variables with the
values from Kconfig.

To overcome this introduce a Kconfig switch that explcitly selects
whether we want to have the variables from Kconfig or the environment.
Also, only pass the variables from the environment when explicitly
wanted.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>