Merge branch 'for-next/zii'

ARM: dts: imx6ul: phycore: Add phyCORE-i.MX 6ULL with eMMC ...

Add a phyCORE-i.MX 6ULL with eMMC. It has following features:
	- i.MX 6ULL Y2 792 MHz
	- 512 MB RAM
	- 4 GB eMMC
	- 10/100 MBits Ethernet
	- USB OTG
	- USB Host

Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: imx6ul: phycore: Prepare for eMMC module ...

Prepare for the new phyCORE-i.MX 6UL/ULL eMMC module by extending the
dts filenames by their boot medium. Also add the boot medium to the
compatible to be able to perform boot medium dependent setup code.

Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: phytec-som-imx6: Add low cost variant for imx6dl phycore ...

The phyCORE-i.MX 6Solo/DualLight is available with low-cost and
full-featured phyBOARD-Mira. One crucial difference is the supported
max. ethernet speed. On the full-featured Mira it is 1000 MBit/s but on
the low-cost Mira it is only 100 MBit/s. To cover this difference two
different images are necessary for low-cost and full-featured. Thus a
low-cost variant is added for the phyCORE-i.MX 6Solo with NAND and the
phyCORE-i.MX 6 DualLight with eMMC.

Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: Rename zii-imx7d-rpu2 to zii-imx7d-dev ...

To prepare for addition of another ZII i.MX7D based board, i.MX7D
RMU2, rename zii-imx7d-rpu2 to zii-imx7d-dev to avoid any image naming
confusion.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX6: add support for Digi CCIMX6UL SBC Pro ...

Add support for the Digi CCIMX6UL SBC Pro.
It is based on the Digi CCIMX6UL SOM with 256MB RAM and 256MB NAND
flash.

v2:
- fix includes
- rename folder to som
- switch to compressed dtb
- remove the unnecessary get_runtime_offset
all from Ahmad Fatoum

Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/layerscape'

ARM: Makefile.imx: group and sort board entries ...

Add new grouping comments for vf6xx- and Cortex-A7 based i.MX6 boards.
Sort moved entries alphabetically.

Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

pbl multiimage: Allow to check image sizes ...

PBL images are often constrained in size by limitations exposed by
the SoCs SRAM size or partition sizes on the boot device. So far
we tried to configure these limits in Kconfig, but with PBL multi
images and thus different limitations for the different supported
images this no longer works. This patch has another approach for
it:

During build time make variables containing the relevant sizes for
each image are created. These are:

PBL_CODE_SIZE_$(symbol)
PBL_MEMORY_SIZE_$(symbol)
PBL_IMAGE_SIZE_$(symbol)

PBL_CODE_SIZE_$(symbol) contains the pure code size of the PBL, it
should be smaller than the available SRAM during boot. Normally the
PBL's bss segment also needs to be in the initial SRAM, for this
case PBL_MEMORY_SIZE_$(symbol) is the relevant variable.
PBL_IMAGE_SIZE_$(symbol) contains the full size of the PBL image
including the compressed payload (but without any image headers
created later by SoC specific image tools).

$(symbol) is a placeholder for the start symbol used for this PBL image,
thus for the i.MX53 QSB with entry start_imx53_loco

PBL_CODE_SIZE_start_imx53_loco

will be created. The images/Makefile.* can use these variables directly
to check sizes or specify the same variables with a "MAX_" prefix. So
when images/Makefile.imx specifies

MAX_PBL_CODE_SIZE_start_imx53_loco = 0x10000

then the build system will make sure that the PBL code for the QSB will
not get bigger than 64KiB.

Also included in this patch are the size restrictions for the i.MX8MQ
images as an example how to use this.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: phyCORE-i.MX8M SOM support ...

The phyCORE-i.MX8M aka PCL-066 is a SoM containing a i.MX8M SoC.

phyCORE-i.MX8M:
 - 1GB LPDDR4 RAM
 - eMMC
 - microSD
 - Ethernet

Signed-off-by: Christian Hemp <christian.hemp@posteo.de>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: Add support for ZII i.MX8MQ based devices ...

Add support for the following ZII i.MX8MQ based boards:

   - ZII i.MX8MQ RMB3
   - ZII i.MX8MQ Zest

Most of the basic peripherals are supported by this patch. More
advanced features such as PCIe, display support, etc, are planned to
be added later.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: imx: add support for Udoo Neo full ...

Original patch from Uwe Kleine-König, I fixed the
review comments and the imxcfg file to use the udoo neo values.

I also tested the support on the udoo neo full board.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: CCMX51: Switch to multiimage support ...

This is a cumulative patch for the Digi ConnectCore CCMX51 SOM.
It includes:
- Switch board to devicetree probe.
- Add MMC update handler.
- Switch to multiimage support.
- Cleanup and optimize board code.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

phycard-imx27: add support for 64MB RAM variants ...

Some older pca100 boards were available with 64MB RAM. The chips
require a slightly different sdram controller initialization. Support
this by building bootloader images for both variants.

Signed-off-by: Florian Bäuerle <florian.baeuerle@allegion.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: phytec-som-imx6: Add full featured phyCORE-i.MX 6ULL ...

The phyCORE-i.MX 6ULL now comes in a full featured (Y2 variant) and a
low cost (Y0 variant) version. The main difference for the barebox is
the missing second USB OTG port on the Y0 variant and the RAM configuration.

So to account for these differences the existing low cost version is
renamed and the full featured version added.

The results are following phyCORE-i.MX 6ULL modules:

phyCORE-i.MX 6ULL low cost:
	- i.MX 6ULL Y0
	- 256 MB RAM
	- NAND
	- Ethernet 10/100 MBits
	- USB OTG

phyCORE-i.MX 6ULL full featured:
	- i.MX 6ULL Y2
	- 512 MB RAM
	- NAND
	- Ethernet 10/100 MBits
	- USB OTG
	- USB Host

Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: images: use piggydata ...

The way we assemble the multi images on ARM is rather complicated and
error prone. We currently cat the compressed barebox image behind the
PBL executable and need some magic to obtain the size of the payload and
also have to do tricks to reliably get a pointer to the compressed
image.

This patch switches over to compile the compressed payload into the PBL
image itself which has proven to work for the single PBL case and for
the ARM Linux Kernel aswell.

The goal is to unify the single PBL and the multi PBL cases together in
the future to get an easier startup path for ARM.

This patch has been tested on the i.MX53 QSB, i.MX53 Vincell, Beaglebone
black (both MLO and 2nd stage) and a Phytec phyFLEX i.MX6 board.

SoCFPGA Arria10 has also be changed slightly with this patch. We used to
generate a single image (barebox-socfpga-achilles.img) which was
used as xload image and full image. We now instead generate two images:
barebox-socfpga-achilles-xload.img and barebox-socfpga-achilles.img, the
former loaded by the ROM and the latter loaded by the xload image.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: GuF Vincell: Use DCD table to setup SDRAM ...

This patch removes the xload mechanism to configure SDRAM and instead
installs a DCD table. The DCD table has been generated from the FSL
DDR3 script aid Excel sheet (version 0.0.1). The calibration values
were taken from a calibration run with the barebox internal functions.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: Add liteboard support ...

liteboard is a development board which uses liteSOM as its
base. liteSOM can't exist on its own, but is used as part
of other boards - it only contains processor and memory.

Hardware specification:
 * liteSOM:
   - i.MX6UL
   - 256M or 512M DDR3 RAM
   - eMMC (uSDHC2)
 * Ethernet PHY
 * USB host (usb_otg1)
 * MicroSD slot (uSDHC1)

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

i.MX: Add support for ZII's i.MX7D-based RPU2 board ...

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/imx-hab'

images: imx: Add targets for signed encrypted images ...

Add .esimximg and .esimximg.dek targets for signed and encrypted
images and their corresponding DEKs. Also add rule to generate final
.img.dek files.

As an example, adding encrypted images for imx6ull_evk would look like
this:

  FILE_barebox-nxp-imx6ull-evk-encrypted.img = start_nxp_imx6ull_evk.pblx.esimximg
  image-$(CONFIG_MACH_NXP_IMX6ULL_EVK) += barebox-nxp-imx6ull-evk-encrypted.img

  FILE_barebox-nxp-imx6ull-evk-encrypted.img.dek = start_nxp_imx6ull_evk.pblx.esimximg.dek
  image-$(CONFIG_MACH_NXP_IMX6ULL_EVK) += barebox-nxp-imx6ull-evk-encrypted.img.dek

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Revert "i.MX: Add provisions to boot from IRAM" ...

After being introduced 3 years ago this feature ended up being
"obsoleted by events" and project it was supposed to be a part of
winded down.

Revert this feature due to:

  a) Lack of users

  b) Existence of better way to make barebox load via SRAM as
  intermediary step that does not require two separate images to be
  built (.imx-sram-img)

This reverts commit 903c947.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/imx8mq'

ARM: i.MX: Add support for ZII RDU1 board ...

ZII RDU1 is a i.MX51 based, Babbagde board derivative supported by
upstream kernel. This commit add support for it to Barebox.

Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX8: Add i.MX8mq EVK support ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: phytec-som-imx6: add phyCORE-i.MX6 Solo with 1GiB RAM ...

Add Phytec phyCORE-i.MX6 Solo:
  - imx6dl-phytec-phycore-som-nand:
    - 1GiB RAM on 1 Bank with 32Bit
    - 100Mbit Ethernet
    - NAND
    - SD
    - UART

Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>

ARM: i.MX: phytec-som-imx6: add phyCORE-i.MX6 QuadPlus with 1GiB RAM ...

Add Phytec phyCORE-i.MX6 QuadPlus:
 - imx6qp-phytec-phycore-som-nand:
   - 1GiB RAM on 2 Banks with 64Bit
   - 1000Mbit Ethernet
   - NAND
   - SD
   - UART

Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>

ARM: Add Advantech imx6 board support ...

Add support for Advantech i.MX6 SOM named ROM-7421.

Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX53 TX53: remove duplicate _imx53 ...

The pblx-y variables for the TX53 have _imx53 twice in their names. With
this the names do not match the names in the FILE_* variables. This
results in the make system removing the pblx files as intermediate
files. Fix the names.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

i.MX53/TX53: add new samsung based xx30 variant ...

Karo is deploying their latest tx53 modules with samsung instead of
nanya ram. Unfortunatly the still keep the old revision for that
modules. We add this modules as an extra xx30 samsung variant.

Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>