RISC-V: unbreak built-in dtb ...

The commit c5d38e92010174 ("lds: Add and use RO_DATA_SECTION macro")
consolidates all RO sections link script declaration in the single
RO_DATA_SECTION macro. So all all individual RO section declarations
have to be removed from per-arch linker scripts.

Alas the BAREBOX_CLK_TABLE and the BAREBOX_DTB link script sections
were not removed from RISC-V linker script making these sections
declared twice. As a result incorrect __clk_of_table_start and
__dtb_start addresses are passed to the barebox code therefore
the RISC-V barebox is completely unusable.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

lds: Add and use RO_DATA_SECTION macro ...

We have many different pointer arrays which we put into linker sections
and each time there's one added we have to adjust all linker scripts.
This adds a common RO_DATA_SECTION define and uses it for all
architectures. This makes it easier to add a new linker array.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

lds: Move start/end address variables into defines ...

For the older section defines we specify the start and end addresses
outside the macro which means we have to repeat them in each linker
script. Make the start/end addresses part of the define to simplify
things. While at it, add a BAREBOX_ prefix to the INITCALLS and EXITCALLS
macros for consistency to the other defines.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Sam Ravnborg <sam@ravnborg.org>

barebox.lds: Remove unnecessary braces ...

The BAREBOX_CLK_TABLE and BAREBOX_DTB macros are defines that do not
take a parameter, so we can remove the braces.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Kconfig: retire empty <asm/barebox.h> ...

With the latest changes, this file is empty on all archs. Drop it.

Signed-off-by: Ahmad Fatoum <ahmad@a3f.at>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

riscv: use generic bitsperlong.h ...

Linux highly depends on the fact that the 'long' and the pointer
have the same width, and so does barebox.

So, we can always use include/asm-generic/bitsperlong.h, which
determines BITS_PER_LONG depending on CONFIG_64BIT.

This is what Linux does (at least in the kernel-space), and barebox
can follow it.

Currently, barebox only supports 32-bit riscv, but this should work
when it supports 64-bit by adding CONFIG_64BIT to arch/riscv/Kconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

riscv: dts: erizo-generic: fix memory node name ...

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

treewide: surround Kconfig file paths with double quotes ...

Based on Linux commit 8636a1f

This will be needed when you sync Kconfig with Linux 5.0 or later.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

move umode_t typedef from asm/types.h to linux/types.h ...

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

RISC-V: add erizo_generic_defconfig ...

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

RISC-V: erizo: add nmon image creation ...

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

RISC-V: erizo: enable nmon ...

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

RISC-V: erizo: add DEBUG_LL support ...

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

RISC-V: add nmon nano-monitor ...

nmon is a tiny (<1024 bytes) monitor program
for the RV32I processors.

It can operate with NO working RAM at all!

It uses only the processor registers and NS16550-compatible
UART port for operation, so it can be used for a memory
controller setup code debugging.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

RISC-V: add low-level debug macros for ns16550 ...

This patch adds macros for ns16550 port initialization
and single char output. The macros can be used in
MIPS asm pbl code.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

RISC-V: add Erizo SoC support ...

Erizo is an opensource hardware SoC for FPGA.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Add initial RISC-V architecture support ...

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>