From 6f589b1dfa37cb449584b5e827ac3117369a4446 Mon Sep 17 00:00:00 2001
From: Jookia <contact@jookia.org>
Date: Tue, 4 Aug 2020 08:59:17 +1000
Subject: [PATCH 2/7] stm32mp157c-odyssey: Use internal Ethernet clock

This patch does two things: Set PLL4_P to 125MHz, then tell ST's
Ethernet MAC to use that as the Ethernet clock.

This is almost the same as what Seeed does in its kernel, however ST's
vendor property 'st,eth_clk_sel', NOT 'st,eth-clk-sel' with dashes.
The dashes are needed for mainline Linux.
---
 arch/arm/boot/dts/stm32mp157c-odyssey.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/stm32mp157c-odyssey.dts b/arch/arm/boot/dts/stm32mp157c-odyssey.dts
index f2ac92f1ad10..a7ffec8f1516 100644
--- a/arch/arm/boot/dts/stm32mp157c-odyssey.dts
+++ b/arch/arm/boot/dts/stm32mp157c-odyssey.dts
@@ -30,6 +30,10 @@
 	phy-mode = "rgmii-id";
 	max-speed = <1000>;
 	phy-handle = <&phy0>;
+	assigned-clocks = <&rcc ETHCK_K>, <&rcc PLL4_P>;
+	assigned-clock-parents = <&rcc PLL4_P>;
+	assigned-clock-rates = <125000000>; /* Clock PLL4 to 750Mhz in ATF/U-Boot */
+	st,eth-clk-sel;
 
 	mdio0 {
 		#address-cells = <1>;
-- 
2.20.1