LR_IROM1 0x00000000 {
  ER_IROM1 0x00000000 {  ; load address = execution address
   *(RESET, +First)
   *(InRoot$$Sections)
   .ANY (+RO)
  }
  
  
  ARM_LIB_STACK 0x20000000 EMPTY 0x800 {
  }
  
  RW_IRAM1 AlignExpr(+0, 16) {  ; 16 byte-aligned
   .ANY (+RW +ZI)
  }
  
  ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x4000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
  }
}
ScatterAssert(LoadLimit(LR_IROM1) <= 0x00020000)    ; 128 KB APROM
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x20004000)   ; 16 KB SRAM