#! armclang -E --target=arm-arm-none-eabi -x c -mcpu=cortex-m3
;* MPS2 CMSIS Library
;*
;* Copyright (c) 2006-2019 ARM Limited
;* All rights reserved.
;* SPDX-License-Identifier: Apache-2.0
;*
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;* modification, are permitted provided that the following conditions are met:
;*
;* 1. Redistributions of source code must retain the above copyright notice,
;* this list of conditions and the following disclaimer.
;*
;* 2. Redistributions in binary form must reproduce the above copyright notice,
;* this list of conditions and the following disclaimer in the documentation
;* and/or other materials provided with the distribution.
;*
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;* may be used to endorse or promote products derived from this software without
;* specific prior written permission.
;*
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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;* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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;*
; *************************************************************
; *** Scatter-Loading Description File                      ***
; *************************************************************

#include "../memory_zones.h"
#include "../cmsis_nvic.h"

#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#  if defined(MBED_BOOT_STACK_SIZE)
#    define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
#  else
#    define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#  endif
#endif

#if (defined(__stack_size__))
    #define STACK_SIZE  __stack_size__
#else  
    #define STACK_SIZE  MBED_CONF_TARGET_BOOT_STACK_SIZE
#endif

#define ZBT_SRAM2_RAM_FIXED_SIZE  (MBED_CONF_TARGET_BOOT_STACK_SIZE + NVIC_VECTORS_SIZE)

; The vector table is loaded at address 0x00000000 in Flash memory region.
LR_IROM1 ZBT_SRAM1_START ZBT_SRAM1_SIZE  {    ; load region size_region
    ER_IROM1 ZBT_SRAM1_START ZBT_SRAM1_SIZE  {  ; load address = execution address
      *.o (RESET, +First)
      *(InRoot$$Sections)
      *(+RO)
    }

    ; NVIC_VECTORS_SIZE Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
    RW_IRAM1 (ZBT_SRAM2_START + NVIC_VECTORS_SIZE) (ZBT_SRAM2_SIZE - NVIC_VECTORS_SIZE - STACK_SIZE)  {  ; RW data
      *(+RW +ZI)
    }

    ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (ZBT_SRAM2_SIZE - ZBT_SRAM2_RAM_FIXED_SIZE - (AlignExpr(ImageLimit(RW_IRAM1), 16) - ZBT_SRAM2_START)) { ; Heap growing upward
    }

    ARM_LIB_STACK (ZBT_SRAM2_START + ZBT_SRAM2_SIZE) EMPTY - STACK_SIZE { ; Stack region growing down
    }
}