/*
 * Copyright (c) 2009-2018 ARM Limited. All rights reserved.
 *
 * SPDX-License-Identifier: Apache-2.0
 *
 * Licensed under the Apache License, Version 2.0 (the License) you may
 * not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 * http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */

/*
 * WARNING: these symbols are the same as the defines in ../memory_zones.h but
 * can not be included here. Please make sure that the two definitions match.
 */
/* Code memory zones */
define symbol FLASH_START       = 0x00000000;
define symbol FLASH_SIZE        = 0x00040000; /* 256 KiB */
define symbol ZBT_SSRAM1_START  = 0x00400000;
define symbol ZBT_SSRAM1_SIZE   = 0x00400000; /* 4 MiB */

/* Data memory zones */
define symbol SRAM0_START       = 0x20000000;
define symbol SRAM0_SIZE        = 0x00008000; /* 32 KiB */
define symbol SRAM1_START       = 0x20008000;
define symbol SRAM1_SIZE        = 0x00008000; /* 32 KiB */
define symbol SRAM2_START       = 0x20010000;
define symbol SRAM2_SIZE        = 0x00008000; /* 32 KiB */
define symbol SRAM3_START       = 0x20018000;
define symbol SRAM3_SIZE        = 0x00008000; /* 32 KiB */
define symbol ZBT_SSRAM23_START = 0x20400000;
define symbol ZBT_SSRAM23_SIZE  = 0x00400000; /* 4 MiB */

/* NVIC vector numbers and size. */
define symbol NVIC_NUM_VECTORS        = 16 + 57;
define symbol NVIC_VECTORS_SIZE       = NVIC_NUM_VECTORS * 4;

/* Specials */
define symbol __ICFEDIT_intvec_start__ = FLASH_START;

/* Memory Regions */
define symbol __ICFEDIT_region_ROM_start__    = ZBT_SSRAM1_START;
define symbol __ICFEDIT_region_ROM_end__      = ZBT_SSRAM1_START + ZBT_SSRAM1_SIZE - 1;
/*
 * At execution, RAM is set to be in ZBT SSRAM2 and 3, just after the vector
 * table previously moved from Flash.
 */
define symbol __ICFEDIT_region_RAM_start__    = ZBT_SSRAM23_START + NVIC_VECTORS_SIZE;
define symbol __ICFEDIT_region_RAM_end__      = ZBT_SSRAM23_START + ZBT_SSRAM23_SIZE;

/* Sizes */
/* Heap and Stack size */
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
    define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400;
}
define symbol __ICFEDIT_size_heap__   = MBED_CONF_TARGET_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_cstack__ = 0x1000;

define memory mem with size = 4G;
define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];

initialize by copy { readwrite };
do not initialize  { section .noinit };

define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };

place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region   { readonly };
place in RAM_region   { readwrite,
                        block CSTACK, block HEAP };