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mbed-os / targets / TARGET_ARM_SSG / TARGET_MPS2 / TARGET_MPS2_M0P / device / TOOLCHAIN_ARM_STD / MPS2.sct
#! armclang -E --target=arm-arm-none-eabi -x c -mcpu=cortex-m0plus
;* MPS2 CMSIS Library
;*
;* Copyright (c) 2006-2019 Arm Limited
;* All rights reserved.
;*
;* Redistribution and use in source and binary forms, with or without
;* modification, are permitted provided that the following conditions are met:
;*
;* 1. Redistributions of source code must retain the above copyright notice,
;* this list of conditions and the following disclaimer.
;*
;* 2. Redistributions in binary form must reproduce the above copyright notice,
;* this list of conditions and the following disclaimer in the documentation
;* and/or other materials provided with the distribution.
;*
;* 3. Neither the name of the copyright holder nor the names of its contributors
;* may be used to endorse or promote products derived from this software without
;* specific prior written permission.
;*
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
;* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
;* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
;* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
;* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
;* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
;* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
;* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
;* POSSIBILITY OF SUCH DAMAGE.
;*
; *************************************************************
; *** Scatter-Loading Description File                      ***
; *************************************************************

#if !defined(MBED_APP_START)
#define MBED_APP_START            0x00000000
#endif

#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE             0x00400000
#endif

#if !defined(MBED_RAM_START)
#define MBED_RAM_START            0x20000000
#endif

#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE             0x400000
#endif

#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#  if defined(MBED_BOOT_STACK_SIZE)
#    define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
#  else
#    define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#  endif
#endif

; Total: 64 vectors = 256 bytes (0x100) to be reserved in RAM
#define VECTOR_SIZE                 0x100

#define RAM_FIXED_SIZE              (MBED_CONF_TARGET_BOOT_STACK_SIZE + VECTOR_SIZE)

#define MBED_RAM1_START (MBED_RAM_START + VECTOR_SIZE)
#define MBED_RAM1_SIZE  (MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - VECTOR_SIZE)

LR_IROM1 MBED_APP_START MBED_APP_SIZE  {    ; load region size_region
    ER_IROM1 MBED_APP_START MBED_APP_SIZE  {  ; load address = execution address
        *.o (RESET, +First)
        *(InRoot$$Sections)
        *(+RO)
    }

    RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE  {  ; RW data
        *(+RW +ZI)
    }

    ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE - RAM_FIXED_SIZE - (AlignExpr(ImageLimit(RW_IRAM1), 16) - MBED_RAM1_START)) { ; Heap region growing up
    }

    ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down
    }
}