#! armclang -E --target=arm-arm-none-eabi -x c -mcpu=cortex-m0plus /* ** ################################################################### ** Processors: MKL43Z256VLH4 ** MKL43Z256VMP4 ** ** Compiler: Keil ARM C/C++ Compiler ** Reference manual: KL43P64M48SF6RM, Rev.3, Aug 2014 ** Version: rev. 1.6, 2015-07-29 ** Build: b160406 ** ** Abstract: ** Linker file for the Keil ARM C/C++ Compiler ** ** Copyright (c) 2016 Freescale Semiconductor, Inc. ** All rights reserved. ** ** Redistribution and use in source and binary forms, with or without modification, ** are permitted provided that the following conditions are met: ** ** o Redistributions of source code must retain the above copyright notice, this list ** of conditions and the following disclaimer. ** ** o Redistributions in binary form must reproduce the above copyright notice, this ** list of conditions and the following disclaimer in the documentation and/or ** other materials provided with the distribution. ** ** o Neither the name of Freescale Semiconductor, Inc. nor the names of its ** contributors may be used to endorse or promote products derived from this ** software without specific prior written permission. ** ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED ** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; ** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ** ** http: www.freescale.com ** mail: support@freescale.com ** ** ################################################################### */ #define __ram_vector_table__ 1 #if (defined(__ram_vector_table__)) #define __ram_vector_table_size__ 0x00000200 #else #define __ram_vector_table_size__ 0x00000000 #endif #define m_interrupts_start 0x00000000 #define m_interrupts_size 0x00000200 #define m_flash_config_start 0x00000400 #define m_flash_config_size 0x00000010 #define m_text_start 0x00000410 #define m_text_size 0x0003FBF0 #define m_interrupts_ram_start 0x1FFFE000 #define m_interrupts_ram_size __ram_vector_table_size__ #define m_data_start (m_interrupts_ram_start + m_interrupts_ram_size) #define m_data_size (0x00008000 - m_interrupts_ram_size) #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) # if defined(MBED_BOOT_STACK_SIZE) # define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE # else # define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 # endif #endif /* Sizes */ #if (defined(__stack_size__)) #define Stack_Size __stack_size__ #else #define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE #endif LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load region size_region VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address * (RESET,+FIRST) } ER_m_flash_config m_flash_config_start FIXED m_flash_config_size { ; load address = execution address * (FlashConfig) } ER_IROM1 m_text_start m_text_size { ; load address = execution address * (InRoot$$Sections) .ANY (+RO) } #if (defined(__ram_vector_table__)) VECTOR_RAM m_interrupts_ram_start EMPTY m_interrupts_ram_size { } #else VECTOR_RAM m_interrupts_start EMPTY 0 { } #endif RW_m_data m_data_start m_data_size { ; RW data .ANY (+RW +ZI) } RW_IRAM1 +0 { } ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (m_data_start + m_data_size - Stack_Size - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap region growing up } ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down } }