#! armclang -E --target=arm-arm-none-eabi -x c -mcpu=cortex-m4
; MAX32620
; 2MB FLASH (0x200000) @ 0x000000000
; 256KB RAM (0x40000) @ 0x20000000


#if !defined(MBED_APP_START)
  #define MBED_APP_START  0x000000000
#endif

#if !defined(MBED_APP_SIZE)
  #define MBED_APP_SIZE  0x200000
#endif

; MAX32620: 2MB FLASH (0x200000) + 256KB RAM (0x40000)
#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x40000
#endif

#if !defined(MBED_RAM_START)
#define MBED_RAM_START 0x20000000
#endif

#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#  if defined(MBED_BOOT_STACK_SIZE)
#    define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
#  else
#    define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x800
#  endif
#endif

; [RAM] Vector table dynamic copy: 65 vectors * 4 bytes = 260 (0x104) + 4
; for 8 byte alignment
#define VECTOR_SIZE 0x108
#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE
#define RAM_FIXED_SIZE  (Stack_Size + VECTOR_SIZE)

#define MBED_RAM1_START (MBED_RAM_START+VECTOR_SIZE)
#define MBED_RAM1_SIZE (MBED_RAM_SIZE-RAM_FIXED_SIZE)

LR_IROM1 MBED_APP_START MBED_APP_SIZE  {    ; load region size_region
    ER_IROM1 MBED_APP_START MBED_APP_SIZE  {  ; load address = execution address 
        *.o (RESET, +First)
        *(InRoot$$Sections)
        .ANY (+RO)
    }
    RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE  {  ; RW data
        .ANY (+RW +ZI)
    }
    ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - RAM_FIXED_SIZE - (AlignExpr(ImageLimit(RW_IRAM1), 16))){ ; heap region growing up
    }
    ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -Stack_Size { ; stack region growing down
    }
}