/*###ICF### Section handled by ICF editor, don't touch! ****/ /*-Editor annotation file-*/ /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x00000000; } if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x00080000; } if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } /*-Specials-*/ define symbol __ICFEDIT_intvec_start__ = MBED_APP_START; /*-Memory Regions-*/ define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START; define symbol __ICFEDIT_region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1; define symbol __ICFEDIT_region_IRAM_start__ = 0x20000000; define symbol __ICFEDIT_region_IRAM_end__ = 0x2000FF00 - 1; define symbol __region_CRASH_DATA_RAM_start__ = 0x2000FF00; define symbol __region_CRASH_DATA_RAM_end__ = 0x20010000 - 1; define symbol __ICFEDIT_region_XRAM_start__ = 0x60000000; define symbol __ICFEDIT_region_XRAM_end__ = 0x60100000 - 1; /*-Sizes-*/ define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE; define symbol __ICFEDIT_size_heap__ = 0x400; /**** End of ICF editor section. ###ICF###*/ define memory mem with size = 4G; define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; define region IRAM_region = mem:[from __ICFEDIT_region_IRAM_start__ to __ICFEDIT_region_IRAM_end__]; define region XRAM_region = mem:[from __ICFEDIT_region_XRAM_start__ to __ICFEDIT_region_XRAM_end__]; define region CRASH_DATA_RAM_region = mem:[from __region_CRASH_DATA_RAM_start__ to __region_CRASH_DATA_RAM_end__]; /* Define Crash Data Symbols */ define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start__; define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__; define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; define block HEAP with expanding size, alignment = 8, minimum size = __ICFEDIT_size_heap__ { }; /* NOTE: Vector table base requires to be aligned to the power of vector table size. Give a safe value here. */ define block IRAMVEC with alignment = 1024, size = 4 * (16 + 142) { }; /* Move non-critical libraries to external SRAM while internal SRAM is insufficient. */ define block XRAM_NC with alignment = 8 { zeroinit object *lwip_*, zeroinit object *mesh_system.o }; initialize by copy { readwrite }; do not initialize { section .noinit }; place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; place in ROM_region { readonly }; place at start of IRAM_region { block CSTACK }; place in IRAM_region { block IRAMVEC }; place in IRAM_region { readwrite }; place in XRAM_region { block XRAM_NC, block HEAP };