#! armclang -E --target=arm-arm-none-eabi -x c -mcpu=cortex-m0

#if !defined(MBED_APP_START)
  #define MBED_APP_START            0x00000000
#endif

; 32K flash
#if !defined(MBED_APP_SIZE)
  #define MBED_APP_SIZE             0x8000
#endif

; 4KB
#if !defined(MBED_RAM_START)
  #define MBED_RAM_START            0x10000000
#endif

#if !defined(MBED_RAM_SIZE)
  #define MBED_RAM_SIZE             0x00001000
#endif


#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#  if defined(MBED_BOOT_STACK_SIZE)
#    define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
#  else
#    define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#  endif
#endif

; 8_byte_aligned(48 vect * 4 bytes) =  8_byte_aligned(0xC0) = 0xC0
#define VECTOR_SIZE                 0xC0

#define RAM_FIXED_SIZE              (MBED_CONF_TARGET_BOOT_STACK_SIZE+VECTOR_SIZE)

#define MBED_RAM1_START (MBED_RAM_START+VECTOR_SIZE)

LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region

  ER_IROM1  MBED_APP_START  MBED_APP_SIZE  {  ; load address = execution address
   *.o (RESET, +First)
   *(InRoot$$Sections)
   .ANY (+RO)
  }

  RW_IRAM1  MBED_RAM1_START  (MBED_RAM_SIZE-VECTOR_SIZE)  {  ; RW data
   .ANY (+RW +ZI)
  }

  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM1_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
  }

  ARM_LIB_STACK  (MBED_RAM_START+MBED_RAM_SIZE)  EMPTY  -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack
  }
}