#! armclang -E --target=arm-arm-none-eabi -x c -mcpu=cortex-a9
;**************************************************
; Copyright (c) 2017 ARM Ltd.  All rights reserved.
;**************************************************

; Scatter-file for RTX Example on Versatile Express

; This scatter-file places application code, data, stack and heap at suitable addresses in the memory map.

#define __RAM_BASE       0x20000000
#define __RAM_SIZE       0x00300000
#define __NC_RAM_SIZE    0x00100000
#define __NM_RAM_SIZE    (__RAM_SIZE - __NC_RAM_SIZE)
#define __DATA_NC_BASE   (__RAM_BASE + __NM_RAM_SIZE + 0x40000000)

#define __UND_STACK_SIZE 0x00000100
#define __SVC_STACK_SIZE 0x00008000
#define __ABT_STACK_SIZE 0x00000100
#define __FIQ_STACK_SIZE 0x00000100
#define __IRQ_STACK_SIZE 0x0000F000
#define __STACK_SIZE     (__UND_STACK_SIZE + __SVC_STACK_SIZE + __ABT_STACK_SIZE + __FIQ_STACK_SIZE + __IRQ_STACK_SIZE)

#define __TTB_BASE       0x20000000
#define __TTB_SIZE       0x00004000

#if !defined(MBED_APP_START)
  #define MBED_APP_START 0x18000000
#endif

#if !defined(MBED_APP_SIZE)
  #define MBED_APP_SIZE 0x800000
#endif

LOAD_TTB    __TTB_BASE __TTB_SIZE ; Page 0 of On-Chip Data Retention RAM
{
    TTB     +0 EMPTY 0x4000            
    { }                           ; Level-1 Translation Table for MMU
}

LR_IROM1 MBED_APP_START MBED_APP_SIZE       ; load region size_region
{
#if (MBED_APP_START == 0x18000000)
  BOOT_LOADER_BEGIN MBED_APP_START FIXED
  {
    * (BOOT_LOADER)
  }

  VECTORS (MBED_APP_START + 0x4000) FIXED
  {
    * (RESET, +FIRST)         ; Vector table and other startup code
    * (InRoot$$Sections)      ; All (library) code that must be in a root region
    * (+RO-CODE)              ; Application RO code (.text)
  }
#else
  VECTORS MBED_APP_START FIXED
  {
    * (RESET, +FIRST)         ; Vector table and other startup code
    * (InRoot$$Sections)      ; All (library) code that must be in a root region
    * (+RO-CODE)              ; Application RO code (.text)
  }
#endif

  RO_DATA    +0
  { * (+RO-DATA) }              ; Application RO data (.constdata)

  RAM_CODE   0x20020000
  { * (RAM_CODE) }              ; Application RAM_CODE

  RW_DATA     +0 ALIGN 0x8
  { * (+RW) }                   ; Application RW data (.data)

  RW_IRAM1    +0 ALIGN 0x10
  { * (+ZI) }                   ; Application ZI data (.bss)

  ARM_LIB_HEAP  +0 ALIGN 0x8
  { * (HEAP) }                  ; Application heap area (HEAP)

  ARM_LIB_STACK (__RAM_BASE + __NM_RAM_SIZE) EMPTY -__STACK_SIZE      ; Stack region growing down
  { }

  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  ; RAM-NC : Internal non-cached RAM region
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

  RW_DATA_NC __DATA_NC_BASE __NC_RAM_SIZE
  { * (NC_DATA) }              ; Application RW data Non cached area

  ZI_DATA_NC +0
  { * (NC_BSS) }               ; Application ZI data Non cached area
}