/* Linker script to configure memory regions.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 ******************************************************************************
 * @attention
 *
 * Copyright (c) 2016-2020 STMicroelectronics.
 * All rights reserved.
 *
 * This software component is licensed by ST under BSD 3-Clause license,
 * the "License"; You may not use this file except in compliance with the
 * License. You may obtain a copy of the License at:
 *                        opensource.org/licenses/BSD-3-Clause
 *
 ******************************************************************************
*/
/* Device specific values */

// 1MB FLASH (0x100000)
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08100000; }
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; }
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; }

define symbol __intvec_start__     = MBED_APP_START;
define symbol __region_ROM_start__ = MBED_APP_START;
define symbol __region_ROM_end__   = MBED_APP_START + MBED_APP_SIZE - 1;

// Vector table dynamic copy: 166 vectors = 664 bytes (0x298) reserved
define symbol __NVIC_start__                  = 0x10000000;
define symbol __NVIC_end__                    = 0x10000297;
define symbol __region_RAM_start__            = 0x10000298; // Aligned on 8 bytes
define symbol __region_RAM_end__              = 0x10000000 + 0x48000 - 1;


// Memory regions
define memory mem with size = 4G;
define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];

// Stack and Heap
define symbol __size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
define symbol __size_heap__   = 0x10000; // 64KB
define block CSTACK    with alignment = 8, size = __size_cstack__   { };
define block HEAP      with alignment = 8, size = __size_heap__     { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };

initialize by copy with packing = zeros { readwrite };
do not initialize  { section .noinit };

place at address mem:__intvec_start__ { readonly section .intvec };

place in ROM_region   { readonly };
place in RAM_region   { readwrite, block STACKHEAP };