#! armclang -E --target=arm-arm-none-eabi -x c -mcpu=cortex-m4
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;#include "../memory_zones.h"
#include "../cmsis_nvic.h"

#if !defined(MBED_ROM_START)
#define MBED_ROM_START  0x0000000
#endif

#if !defined(MBED_ROM_SIZE)
#define MBED_ROM_SIZE  0x200000  // 2 MB
#endif

#if !defined(MBED_RAM_START)
#define MBED_RAM_START  0x20000000
#endif

#if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE  0x40000  // 256 KB
#endif

#if !defined(MBED_APP_START)
#define MBED_APP_START  0x00000000
#endif
#if !defined(MBED_APP_SIZE)
#define MBED_APP_SIZE   0x0080000  //512KB
#endif

#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#  if defined(MBED_BOOT_STACK_SIZE)
#    define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
#  else
#    define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#  endif
#endif

#if (defined(__stack_size__))
    #define STACK_SIZE  __stack_size__
#else
    #define STACK_SIZE  MBED_CONF_TARGET_BOOT_STACK_SIZE
#endif

#define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE + NVIC_VECTORS_SIZE)

#define MBED_RAM1_START (MBED_RAM_START + NVIC_VECTORS_SIZE)
#define MBED_RAM1_SIZE (MBED_RAM_SIZE - NVIC_VECTORS_SIZE - STACK_SIZE)

; The vector table is loaded at address 0x00000000 in Flash  memory region.
LR_IROM1 MBED_APP_START MBED_APP_SIZE  {    ; load region size_region
  ER_IROM1 MBED_APP_START MBED_APP_SIZE  {  ; load address = execution address
   *.o (RESET, +First)
   *(InRoot$$Sections)
   *(+RO)
  }
  ; NVIC_VECTORS_SIZE Total
  RW_IRAM1 MBED_RAM1_START MBED_RAM1_SIZE  {  ; RW data
   *(+RW +ZI)
  }
  ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE - RAM_FIXED_SIZE - (AlignExpr(ImageLimit(RW_IRAM1), 16) - MBED_RAM1_START)) { ; Heap growing up
  }
  ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY - STACK_SIZE { ; Stack region growing down
  }
}