/*
 * Copyright(C) 2019, Toshiba Electronic Device Solutions Corporation
 *
 * SPDX-License-Identifier: Apache-2.0
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *     http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 */
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x00000000; }
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x180000; }
define symbol __ICFEDIT_intvec_start__ = MBED_APP_START;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__   = MBED_APP_START;
define symbol __ICFEDIT_region_ROM_end__     = MBED_APP_START + MBED_APP_SIZE - 1;
define symbol __ICFEDIT_region_RAM_start__   = 0x20000320;
define symbol __ICFEDIT_region_RAM_end__     = 0x2002FFFF;
define symbol __ICFEDIT_region_BRAM_start__  = 0x20030000;
define symbol __ICFEDIT_region_BRAM_end__    = 0x200307FF;
/*-Sizes-*/
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
    define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400;
}
define symbol __ICFEDIT_size_cstack__   = MBED_CONF_TARGET_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__     = 0x6000;
/**** End of ICF editor section. ###ICF###*/

define memory mem with size = 4G;
define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];

define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };

initialize by copy { readwrite };
do not initialize  { section .noinit };

initialize by copy { section RAMCODE };

/* Place both in a block */
define block RamCode { section RAMCODE };
define block RamCodeInit { section RAMCODE_init };

/* Place them in ROM and RAM */
place in ROM_region { block RamCodeInit };
place in RAM_region { block RamCode };

place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };

place in RAM_region   { readwrite,
                        block CSTACK, block HEAP };
place in ROM_region   { readonly };