STM32 SPI specific mode for higher performance
This commit implements a SPI mode which will offer better performance thanks to usage of Lower Layer API which use fewer registers access, at the cost of lower robustness (no error management). |
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targets/TARGET_STM/TARGET_STM32F0/spi_device.h 0 → 100644 |
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targets/TARGET_STM/TARGET_STM32F1/spi_device.h 0 → 100644 |
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targets/TARGET_STM/TARGET_STM32F2/spi_device.h 0 → 100644 |
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targets/TARGET_STM/TARGET_STM32F3/spi_device.h 0 → 100644 |
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targets/TARGET_STM/TARGET_STM32F4/spi_device.h 0 → 100644 |
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targets/TARGET_STM/TARGET_STM32F7/spi_device.h 0 → 100644 |
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targets/TARGET_STM/TARGET_STM32L0/spi_device.h 0 → 100644 |
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targets/TARGET_STM/TARGET_STM32L1/spi_device.h 0 → 100644 |
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targets/TARGET_STM/TARGET_STM32L4/spi_device.h 0 → 100644 |
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targets/TARGET_STM/stm_spi_api.c |
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