This patch changes the linker files and defines to use the ZBT SSRAM
instead of the FPGA Block RAM for code and data.
The section 4.1.1, Code and RAM memory map, of the CM3DS Eval RTL and
testbench user guide explains the available memories.
This switch improves code memory from 256 kB to 4 MB and data memory
from 128 kB to 4 MB.

However, the ZBT SSRAM1 for code memory begins at 0x00400000 while the
processor can only boot at address 0x00000000 which means that it
expects the vector table to be at that address. That is why we have to
create 2 load regions in the linker scripts: one with only the vector
table at address 0x0 and one with code + data at address 0x00400000.
Because of these two load regions, linker will produce different
behaviours:
    * GCC_ARM and IAR will only create 1 binary with both load regions
padding with 0 in between. The binary will then be very large (at least
4 MB) and the flash process will take longer.
    * ARM and ARMC6 will create 2 binaries for the two load regions. The
load addresses of the two binaries can be written in the images.txt file
on the MPS2 board. You can also use the --bincombined option of fromelf
utility to produce only 1 large binary.

This patch also adds the memory_zones.h file to try to put in common all
the memory addresses that were previously hard coded in the linker
scripts / startup files.

With that patch in, the simplest option is to directly use the .elf file
with the MPS2, which is only possible with mbb_v225.ebf and more recent
firmwares. It will now be the default for CM3DS.

This commit works with greentea thanks to the now merged pull request
ARMmbed/htrun#181 in order to copy .elf file to the MPS2 board.

Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>