* Use compile-time detection of hardware CRC capability, so unneeded
  code and tables do not go into the image.
* Add global JSON config option to allow choice between no tables,
  16-entry tables or 256-entry tables for software CRC. Default set
  to 16-entry, reducing ROM size from previous 256-entry.
* Allow manual override in template parameter to force software or
  bitwise CRC for a particular instance.
* Micro-optimisations, particularly use of `RBIT` instruction and
  optimising bitwise computation using inline assembler.

Incompatible changes:

* Remove special-case "POLY_32BIT_REV_ANSI" - users can use standard
  POLY_32BIT_ANSI, which now uses the same 16-entry tables by default,
  or can use hardware acceleration, which was disabled for
  POLY_32BIT_REV_ANSI. MbedCRC<POLY_32BIT_ANSI, 32, CrcMode::TABLE> can
  be used to force software like POLY_32BIT_REV_ANSI.
* The precomputed table for POLY_16BIT_IBM had errors - this has been
  corrected, but software CRC results will be different from the previous
  software calculation.
* < 8-bit CRC results are no longer are shifted up in the output value,
  but placed in the lowest bits, like other sizes. This means that code
  performing the SD command CRC will now need to use `(crc << 1) | 1`,
  rather than `crc | 1`.