Synchronize upstream changes - May 2023 edition (#160) ...

* fix STM32L1 FLASH_SIZE for cat.3 devices with DEV_ID 0x436

* Fix mesh connect semaphore not releasing causing blockage

* Add support of NSAPI_ICMP sockets in Nanostack

* STM32F1: add MCU_STM32F103xD support

* STM32F1: add MCU_STM32F103xG support

* test: Disable failing tests due to echo server

Some tests are failing as echo.mbedcloudtesting.com is not serving TLS
requests anymore.

Signed-off-by: Saheer Babu <saheer.babu@arm.com>

* Check CAN DLC length value

* Fix default interface ID only being used partially

If user sets the default interface ID for a socket (e.g. using setsockopt
with SOCKET_INTERFACE_SELECT), the default interface should take over
other interface selection mechanisms as a interface is bound to the socket.
This applies for both IPv6 local and global scopes for unicast messages
but not for multicast messages as these are bound to a multicast interface
using SOCKET_IPV6_MULTICAST_IF socket option.

* Targets: NXP: IMXRT: Fixed GCC_ARM lds syntax.

Signed-off-by: Yilin Sun <imi415@imi.moe>

* CAN: read only up to 8 bytes

If HAL implementation writes more than 8 bytes of data, error immediately.
CANMessage defines only 8 bytes of data, lenght cannot be > 8.

This fixes https://github.com/ARMmbed/mbed-os/issues/15361

Signed-off-by: Martin Kojtal <martin.kojtal@arm.com>

* STM32F303xC: add RAM_CCM in GCC linker script

* fix(drivers/emac): Remove incorrect RMII RX ER initialization

* fix(drivers/emac): Add missing SPDX indetifier to ST driver files

* fixed compiler inline issue

* Update Mbed version block

* removed HSE speed limitation for STM32G431RB

* Added HSE range validation for STM32g431xB

* added support for 4, 8 and 16MHz

* M487: Remove unused variable 'u32EscapeFrame'

Remove unused variable 'u32EscapeFrame' in BSP m480_ccap.h to avoid warnings

* force FIFO IRQ for FDCan RX on H7

* Add hardware CRC support to STM32G4

* add support for Nucleo-H745ZI

* Update MAX32670 peripheral drivers with final ones that use by SDK

Signed-off-by: Sadik.Ozer <sadik.ozer@analog.com>

* MAX32670 apply mbed required changes on peripheral drivers

Signed-off-by: Sadik.Ozer <sadik.ozer@analog.com>

* M467: Support CAN bus

1.  Update BSP CANFD driver
2.  Notes for implementation
    (1) Each CANFD instance supports two IRQ lines. Use only line 0. Line 1 is not used.
    (2) For Rx disabling multiple filter handles,
        1)  Map all filter handles to filter handle 0
        2)  Use Rx FIFO 0 for filter handle 0
    (3) For Rx enabling multiple filter handles,
        1)  Use Rx FIFO 0 for filter handle 0
        2)  Use Rx FIFO 1 for filter handle through first invoking can_filter()
        3)  Use dedicated Rx Buffer for other filter handles
        NOTE: H/W supports mask on Rx FIFO 0/1 but not on dedicated Rx Buffer.
    (4) For Tx, use only dedicated Tx Buffer. BSP CANFD driver doesn't support Tx FIFO/Queue.
    (5) Support no CAN FD.

* Fix 'new[]' array freed with 'delete'

The array _scratch_buf is allocated using new[] in line 761 of
mbed-os/storage/kvstore/securestore/source/SecureStore.cpp.
But it was freed using delete.

* Define default parameters of functions of derived class the same as the base class

The member function bringup() of class ThreadInterface redefines
parameter stack's default value to IPV6_STACK from the inherited default value
DEFAULT_STACK (in Interface).
The default value will be resolved statically, not by dispatch, so this
can cause confusion.
Similar arguments apply to LoWPANNDInterface and WisunInterface.

* Avoid calling virtual functions from constructors and destructors

Virtual functions are resolved statically (not dynamically) in
constructors and destructors for the same class. The call should be made
explicitly static by qualifying it using the scope resolution operator.

* Fix potentially overrunning write of sprintf

Format string "%d" requires 12 bytes (including the null terminator).
Also, use snprintf instead of sprintf to prevent buffer overflow.

* Fix system_clock.c location

Signed-off-by: Jasper Jonker <jasper.jonker@wingtra.com>

* Fix variable name

Signed-off-by: Jasper <jasper.jonker@wingtra.com>

* Change storage-class of secret_buf to static

Storing the address of a local variable (`secret_buf`)
in non-local memory (`prf_ptr->secret`) can cause a
dangling pointer bug if the address is used after the function returns.

* fix compiling errors of FATFileSystem when exFAT was enabled

* Add OSPI support for STM32H7

* Nuvoton: Enable extending sampling time for ADC/EADC

For all Nuvoton targets, enable extending sampling time in ADC/EADC clocks on per-pin basis.

---------

Signed-off-by: Saheer Babu <saheer.babu@arm.com>
Signed-off-by: Yilin Sun <imi415@imi.moe>
Signed-off-by: Martin Kojtal <martin.kojtal@arm.com>
Signed-off-by: Sadik.Ozer <sadik.ozer@analog.com>
Signed-off-by: Jasper Jonker <jasper.jonker@wingtra.com>
Signed-off-by: Jasper <jasper.jonker@wingtra.com>
Co-authored-by: caodd <caodd1993@qq.com>
Co-authored-by: YannCharbon <yann.charbon@ik.me>
Co-authored-by: Jerome Coutant <jerome.coutant@st.com>
Co-authored-by: Saheer Babu <saheer.babu@arm.com>
Co-authored-by: Martyx00 <martin.petran@protonmail.com>
Co-authored-by: Yilin Sun <imi415@imi.moe>
Co-authored-by: Martin Kojtal <martin.kojtal@arm.com>
Co-authored-by: akiroz <akiroz.vectis@gmail.com>
Co-authored-by: Charles <hallard04@free.fr>
Co-authored-by: Leonard Chiang <leochiang2002@gmail.com>
Co-authored-by: Chun-Chieh Li <ccli8@nuvoton.com>
Co-authored-by: jmcloud <jmcloud@tesla.com>
Co-authored-by: Augusto Zanellato <augusto.zanellato@gmail.com>
Co-authored-by: Sadik.Ozer <sadik.ozer@analog.com>
Co-authored-by: Mingjie Shen <shen497@purdue.edu>
Co-authored-by: Jasper Jonker <jasper.jonker@wingtra.com>
Co-authored-by: wdx04 <wdx04@outlook.com>

Rethink STM32 I2C v2 HAL (#78) ...

* Initial attempt at rethinking the STM32 I2C v2 HAL.  Makes single-byte work properly and adds a new 'state' variable to track what the hardware is doing.

* Fix some initial test failures

* Fix incorrect logic

* Fix more incorrect logic

* Tabs to spaces

* Fix repeated starts with single-byte API

* Fix race condition causing stop() after nacked address to sometimes break things

* Fix missed i2c structs that should have been removed

* Fix doing a repeated start from single-byte to transaction API causing I2C peripheral to lock up

* Fix xferOperation being set wrong for repeated starts, causing the peripheral to hang

* Fix race condition with repeated start after single-byte operation

* Fix compilation for targets that use I2C IP v1

* Fix initialization of XferOperation for API v1, optimize stop()

* Remove unneeded line

* Add docs for I2C events

STM32: increase i2c slave rx limit. ...

Use uint16_t variables for i2c slave_rx_buffer_size and slave_rx_count
variables. This allows to receive more than 255 bytes in slave mode. The
bytes are received one by one in slave mode so there are no hardware
limitations forcing a 1 byte rx count limit.

driver/i2c: STM32: Solves I2C driver performanc issue. ...

This commit solves issue related to i2c driver performance.
With this commit delay in read write when using i2c timing
algorithm is solved. Used flag mechanism which will check
tim reg value and hz passed.

Signed-off-by: Affrin Pinhero <affrin.pinhero@hcl.com>

Merge pull request #14659 from arduino/i2c_slave_patch ...

STM32: make i2c_salve_read return the number of bytes read

STM32H7 ADC : dual pad feature update

make i2c_salve_read return the number of bytes read to let mbed-os read API return an error if less bytes are readed

STM32: LSE DRIVE feature update

STM32H7: update target specific files with Cube-1.8 ...

- startup files pdated from Cube
- all SetSysClock aligned and checked
- license header updated

STM32H7: enable QSPI ...

- DISCO_H747I board has MT25QL512 embedded QSPI

Update HAL CRC API ...

* Change "is supported" check to be a macro, so it can be done at
  compile-time.
* Eliminate weird shift on 7-bit CRCs.
* Add support for 32-bit CRCs and reversals to TMPM3HQ.

TARGET_STM: Improve H747 dual core Deepsleep robustness

TARGET_STM: rework hal_sleep management to be compatible with all STM32 families

Revert "MbedCRC and CRC HAL revisions"

Update HAL CRC API ...

* Change "is supported" check to be a macro, so it can be done at
  compile-time.
* Eliminate weird shift on 7-bit CRCs.
* Add support for 32-bit CRCs and reversals to TMPM3HQ.

DISCO_H747I Dualcore support ...

Add 2 targets for DISCO_H747I dualcore:
* DISCO_H747I      -> for CM7 core
* DISCO_H747I_CM4  -> for CM4 core

Current restrictions:
* TICKLESS deactivated
* DeepSleep not supported (DeepSleep wrapped to sleep)

Warning: use of the same IP (example I2C1) by both core at the same time is not prevented,
but is strongly not recommended.
Some Hardware Semaphore are use for common IP, to manage concurrent access by both cores: Flash, GPIO, RCC.

Warning: Drag and drop of binary to DISCO_H747I will flash CM7.
         In order to flash CM4, one can use STM32 CubeProgrammer tool.

STM32H7 watchdog patch

STM32: pwmout_write: configure channel only when not already enabled ...

Fix PWM glitch on write(), TARGET_STM/pwmout_api.c, #10734

STM32H7 directory cleanup and refactoring