STM-can-api: Added usage of prescaler ...

- This enables more frequencies, but without regard to the accuracy.
May still require manual clock setup, to remain in tolerance window

Use HAL function for FDCAN_CLK-calculation ...

- Thanks to @jeromecoutant for showing the HAL funtion
 - Added #ifdef guard to FDCAN2/3 handler functions

Calculate FDCAN_clk instead of assuming fix 10MHz ...

- The FDCAN_clk is calculated on runtime from the according
RCC-registers

Added support for FDCAN3

make G4 target compileable with CAN support

Added error checking to can_filter() for Classic CAN ...

Previously the function always returned 1 even when the configuration was illegal. I added a small check to HAL_CAN_ConfigFilter(...).

STM pin_function(), pin_mode(): return immediately when given pin is NC ...

Additionally, remove redundant pin checks against NC when above functions are used.

STM CAN: remove CAN_INIT_DIRECT macro

optimize can_init(): call can_init_freq() with default freq

Fix for issue #12104 (STM32 can_init_freq() ignores frequency)

Merge pull request #11950 from ABOSTM/DISCO_H747I_TICKLESS ...

DISCO_H747I: add support of MBED_TICKLESS

Change explicit pinmap to static pinmap

STM CAN driver: Add explicit pinmap support

TARGET_STM: Remove timeout on HSEM. ...

With tickless mechanism hsem can be used for quite a long time
(time to set up PLL clock).
Also, if hsem is held to long, then this is not the current core which is faulty,
but probably the other (the one which hold the HSEM)

DISCO_H747I Dualcore support ...

Add 2 targets for DISCO_H747I dualcore:
* DISCO_H747I      -> for CM7 core
* DISCO_H747I_CM4  -> for CM4 core

Current restrictions:
* TICKLESS deactivated
* DeepSleep not supported (DeepSleep wrapped to sleep)

Warning: use of the same IP (example I2C1) by both core at the same time is not prevented,
but is strongly not recommended.
Some Hardware Semaphore are use for common IP, to manage concurrent access by both cores: Flash, GPIO, RCC.

Warning: Drag and drop of binary to DISCO_H747I will flash CM7.
         In order to flash CM4, one can use STM32 CubeProgrammer tool.

STM32: remove compilation warning

Add HAL API for can pinmap ...

Add the functions can_rd_pinmap and can_td_pinmap to all targets.

STM32: FDCAN support for H7 family

TARGET_STM astyle

STM32 CAN: fix wrong ID and MASK filter

Merge pull request #5667 from productize/fix-stm32-can3 ...

STM32: Fix CAN3

STM32: Set valid filter number for CAN3 ...

Filter numbers 14 to 27 are reserved for dual CAN configuration.
However, CAN3 operates in single CAN configuration according to the
reference manual).

STM32 CAN3: remove test of CAN_2 and CAN_3 ...

CAN_2 and CAN_3 are enum and not #define and this causes compilation error with GCC_ARM

Instead put back the test of CAN_NUM (which are defined in can_device.h).

STM32: Pass correct id to can_irq() for CAN3

Fix RTR position bit in TX mailbox register

STM32: fix error with CAN_3 not defined

STM32: Add support of CAN3 on STM32F413/F767

STM32: CAN: restore registers after can_reset ...

After reset the MCR register content needs to be restored so we're
introducing the can_registers_init function to be called at the first
init stage, but also after reset. We also store the can frequency to
go through the initialisation phase again.

STM32: CAN: store the mode in object context ...

In order to apply the same mode in case of reset, we store the current
requested mode in the HAL structure.

To make storage in a single place, we also change can_monitor to call
can_mode function as they actually acting on same registers.

STM32: CAN: do not overwite BTR register when setting frequency ...

BTR register has other bits than the ones calculated and set through
the can_speed function, so let's take care to only write to the
right registers.