Merge remote-tracking branch 'ARMmbed/master' into pr/psoc6-hal

Merge remote-tracking branch 'ARMmbed/master' into pr/psoc6-hal

Removing absolute paths to compiler executables ...

VSCode exporter was generating a launch config that contained absolute paths to the
compiler executables. It makes more sense to use the executables that are
installed into the system PATH.

Merge pull request #10972 from 0xc0170/test_target ...

add new target IM880B

PSOC6: remove PSA targets

Merge pull request #10950 from artokin/Update_freescale_K6xF_linker_files ...

Enable split heap in K64F/K66F devices

add new target IM880B

Add RZ/A1 settings to arm_package_manager

Merge pull request #10813 from JanneKiiskila/arm-develop-size ...

Make ARMC5 and IAR develop profile also size optimized

ARM linker: add --any_contingency option ...

When packing data into multiple regions using the `.ANY` directive,
the linker can accidentally overfill an area.

This doesn't normally happen because it defaults to
`--any_placement=worst_fit`, which puts data in the region with
most space.

When we prioritise regions with `.ANY1`/`.ANY2`, it may totally fill
an area, then fail to leave enough space for linker-generated veneers.
We've just seen this error with the new K64F linker map.

Adding `--any-contingency` makes it lower priority when a region is
98% full, avoiding this error.

The option should not have any effect on targets with scatter files
without prioritised `.ANY` directives.

Merge pull request #10829 from devran01/feature_trusted-firmware-m_e7efdc6 ...

PSA: TFM import

Update commit sha's ...

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>

Add STM32H743ZI to IAR export definition

Align also IAR - develop profile to be size optimized ...

IAR is also performance optimizing instead of size optimizing in
develop profile. Align also that (review feedback).

Make ARMC5 develop profile also size optimized ...

Due to some historical reasons ARMC 5 compiler behaves very
differently compared to others (GCC, IAR, ARM C 6) as it optimizes
performance rather than size (like the others).

All compilers should behave the same way with the same profile,
thus ARM C 5 should also drive towards size (space).

Merge pull request #10749 from jamesbeyond/example_test ...

Examples: enable more tests for examples

Re-enable complilation for wifi and nanostack examples

[trusted-firmware-m]: Updated to e7efdc6

Examples: enable more tests for examples

ARMC6: Suppress "register deprecated" warning ...

Lots of target code, STM in particular, uses the `register` keyword, so
it'll take a little while to clean up. In the interim, some builds are
producing a lot of warnings. Suppress the warning for now, as `register`
remains legal C++14 and C11, despite C++14 deprecating it.

C++17 removes `register`, so code will need to be cleaned before any
further C++ version update.

Merge pull request #10427 from kjbracey-arm/new_standards ...

Set compilers to C++14 and C11

Merge pull request #10675 from 0xc0170/update-mbedtls-2.18.0-rc1 ...

Update mbedtls 2.18.0 rc1

Revert "Check mbed-crypto-example with fork" ...

This reverts commit ff18a64.
Use the official repository

ARMC6: disable "reserved user-defined literal" warning ...

Clang warns about reserved user-defined literals by default. This
warning is not terribly helpful; compilers aren't normally in the
habit of warning about use of reserved identifiers. It can interfere
with, for example, deliberate emulation of a future standard
language feature.

The warning was promoted to an error in an mbed client build, due to a
non-C++11 "%s"name occurring in a macro. But the macro itself was never
invoked, so the misinterpretation as C++11 caused no problems other than
this warning. Killing the warning will let that code build on ARMC6.
The code already built on GCC and IAR.

If that macro ever was used, then a separate error about operator ""
name not being defined would be generated, on all 3 toolchains.

µVision export: Add ARMC6 `-std` handling ...

This is limited to ARMC6 because as of µVision V5.27 you can't set C++11
for ARMC5.

Also current µVision does not support gnu++14. We should be able to get
is as `<default>`, as it is the default for ARM Compiler 6.10-6.12,
but this option does not work as documented and actually requests
gnu++89 explicitly. So gnu++14 is mapped to gnu++11.

Set compilers to C++14 and C11 ...

* ARMC6 and GCC are set to C++14 and C11.
* ARMC5 is set to C++11 and C99, as it's the highest it can offer.

Merge pull request #10625 from jamesbeyond/example_test ...

TESTS: update examples.json to enable testing

Merge pull request #10627 from devran01/remove_future_sequana_target ...

Remove targets FUTURE_SEQUANA_M0_PSA and FUTURE_SEQUANA_PSA

Use build directory in postbuild ...

Use build directory instead of temp directory for for
intermediate files during binaries merge.

Updates after rebase ...

- postbuild: Use find_secure_image and update prebuilt binaries
- Add CMSIS driver headers
- Align with 2-region memory model