To keep proprietary BSP DutyCycle definition and rename HighDutyCycle in extend API

Support M251/M261/M453/NANO130/NUC472 PWM duty cycle range as 0 ~ 10000

CMake: Refactor Nuvoton targets ...

Refactor all Nuvoton targets to be CMake buildsystem targets. This removes
the need for checking MBED_TARGET_LABELS repeatedly and allows us to be
more flexible in the way we include MBED_TARGET source in the build.

A side effect of this is it will allow us to support custom targets
without breaking the build for 'standard' targets, as we use CMake's
standard mechanism for adding build rules to the build system, rather
than implementing our own layer of logic to exclude files not needed for
the target being built. Using this approach, if an MBED_TARGET is not
linked to using `target_link_libraries` its source files will not be
added to the build. This means custom target source can be added to the
user's application CMakeLists.txt without polluting the build system
when trying to compile for a standard MBED_TARGET.

Nuvoton: Remove DISABLE/ENABLE macro definitions in BSP ...

These are not used on Mbed OS. Remove them to avoid name conflict with other modules.

stack: armc: Workaround config passing bug ...

Workaround a bug where the boot stack size configuration option is not
passed on to armlink, the Arm Compiler's linker. Prefer
MBED_CONF_TARGET_BOOT_STACK_SIZE if present, as this is what the
configuration system should provide. Fall back to MBED_BOOT_STACK_SIZE
if MBED_CONF_TARGET_BOOT_STACK_SIZE is not defined, as in the case of
buggy tools. If both MBED_CONF_TARGET_BOOT_STACK_SIZE and
MBED_BOOT_STACK_SIZE are not defined, then we fall back to a hard-coded
value provided by the linkerscript. See
https://github.com/ARMmbed/mbed-os/issues/13474 for more information.

Use boot stack size from config system ...

To allow overriding of the boot stack size from the Mbed configuration
system, consistently use MBED_CONF_TARGET_BOOT_STACK_SIZE rather than
MBED_BOOT_STACK_SIZE.

Fixes #10319

NANO130: Support bare metal ...

Relevant modifications to make TOOLCHAIN_* directories clear:
1. Remove TOOLCHAIN_ARM_STD
2. Rename TOOLCHAIN_ARM_MICRO to TOOLCHAIN_ARM

NANO130: Make memory specification configurable

NANO130: Enlarge timeout in CLK_WaitClockReady(...) ...

Most code doesn't check return code of CLK_WaitClockReady(...). Enlarge timeout to meet most cases.

lp_ticker initialization fails with this issue. Steps for reproducing:
1.  System runs in tickless from lp_ticker mode.
2.  Arm WDT reset.
3.  In next reset cycle, lp_ticker initialization fails (active flag doesn't become active).

NUMAKER_PFM_NANO130: keep __vector_handlers symbol in LTO builds ...

Add a "used" attribute to __vector_handlers to fix ARMC6 build with
the "-flto" flag.
(Error: L6236E: No section matches selector - no section to be FIRST/LAST.)

This attribute, attached to a function/variable, means that code must be emitted
for the function even if it appears that the function is not referenced.

NANO130 add extern C into nano100_usbd.h for C++ caller

NANO130: Support dynamic heap configuration on IAR ...

On IAR, configure heap to 1KiB at a minimum and expandable, dependent on available SRAM. This requires IAR 8.x.

NANO130: Decrease heap to 2.75KiB to spare SRAM for static allocation ...

This adjustment is to pass compile on IAR on which heap configuration is hard-coded and cannot be adjusted according to staic SRAM usage.

NANO130: Fix OOM with packing algorithm at IAR linking ...

At IAR linking, the default method of 'initialize by copy' is 'auto', which will estimate
different packing algorithms, including complex 'lz77', for smallest memory footprint. But
the algorithm itself can consume some SRAM and cause OOM at linking time for NANO130, which
just has 16KiB SRAM. To avoid this error, always choose 'none' packing algorithm.

[NANO130] Fix optimization error with NVIC_SetVector/NVIC_GetVector on ARMC6 ...

On ARMC6 with optimization level "-Os", the two functions NVIC_SetVector/NVIC_GetVector
will be translated to illegal instruction for trapping due to NVIC_FLASH_VECTOR_ADDRESS
defined as direct 0. Fixed by defining NVIC_FLASH_VECTOR_ADDRESS as a symbol instead to
avoid such optimization error.

Addressed review comments to correct size values

Guard RAM start and size defines

Target_NUVOTON: Add ARM_LIB_STACK and ARM_LIB_HEAP section ...

Instead of user defined symbols in assembly files or C files,
use linker scripts to add heap and stack - this is inconsistent
with ARM std linker scripts

Target_Nuvoton: Remove target specific implementation of _sbrk

[Nuvoton] Support boot stack size configuration option

Merge pull request #5285 from c1728p9/minimum_requirements_test ...

Update devices to have minimum 2K RAM and heap, also added test

Nuvoton: Fix alignment of execute region to 8-byte boundary ...

--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files (GCC and IAR as well to have uniformity)
should strictly align to 8-byte boundary

Set ISR stack and heap sizes for low end devices ...

Set the ISR stack to be 1KB. https://github.com/ARMmbed/mbed-os/pull/7238
Set the heap size to 3KB(2KB + overhead + spare) so that atleast 2KB free ram is
available for testing.
With dynamic heap size, explicit size is not required. IAR 7.8 supports
static heap, hence the change is needed in IAR linker files.

Remove uVisor from mbed-os

Merge pull request #6985 from OpenNuvoton/nuvoton_fix_rtosless_heap ...

Fix heap base/limit error with ARM_LIB_STACK/ARM_LIB_HEAP in RTOS-less

[Nuvoton] Replace __wrap__sbrk with overriding _sbrk ...

With _sbrk being weak, we can override it directly rather than #if to support heap with
two-region model.

[Nuvoton] Merge multiple ARM/ARMC6 sys.cpp into one

[NANO130] Adjust static/dynamic memory allocation for IAR toolchain to pass Greentea test

[NANO130] Fix CLK_Idle incorrectly enters into deep sleep mode ...

This can happen with CLK_PowerDown() called first and then CLK_Idle() called.

[Nuvoton] Fix RTC cannot cross reset cycle