LuminaSensum/mbed-os

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LuminaSensum / mbed-os

History for mbed-os / targets / TARGET_RENESAS / TARGET_RZ_A1XX / TARGET_GR_LYCHEE / device / TOOLCHAIN_IAR

2018-12-20	65b4e72 Browse files » Modify IRQ handler processing without RTOS at Cortex-A IAR Compiler ... In case of unusing RTOS, there is no processing against IRQ handler and it causes a linker error. Therefore, I added this processing with WEAK attribute. Also I added cmain.S file at cmsis/TARGET_CORTEX_A folder. TomoYamanaka committed on 20 Dec 2018
2018-06-21	94c13c5 Browse files » Support Bootloader for GR-PEACH and GR-LYCHEE ... The mainly changes is below: - Update scatter file, linker file for bootloader support - Update the file for RZ/A1 serial flash boot loader - Add "device name" and "bootloader_supported" in targets.json TomoYamanaka committed on 21 Jun 2018
2018-01-15	776b27c Browse files » Add startup processing having CMSIS5/RTX5 been available on GR-LYCHEE ... For supporting to CMSIS5/RTX5, I added the start-up processing of 3 toolchains (ARMCC, GCC_ARM, IAR) and the register definition of RZ/A1LU specific. In addition, I added the linker script files to implement the dynamic HEAP the same as GR-PEACH(RZ/A1H). TomoYamanaka committed on 15 Jan 2018

2018-12-20

65b4e72
Browse files »

Modify IRQ handler processing without RTOS at Cortex-A IAR Compiler ...

In case of unusing RTOS, there is no processing against IRQ handler and it causes a linker error.
Therefore, I added this processing with WEAK attribute. Also I added cmain.S file at cmsis/TARGET_CORTEX_A folder.

TomoYamanaka committed on 20 Dec 2018

2018-06-21

94c13c5
Browse files »

Support Bootloader for GR-PEACH and GR-LYCHEE ...

The mainly changes is below:
- Update scatter file, linker file for bootloader support
- Update the file for RZ/A1 serial flash boot loader
- Add "device name" and "bootloader_supported" in targets.json

TomoYamanaka committed on 21 Jun 2018

2018-01-15

776b27c
Browse files »

Add startup processing having CMSIS5/RTX5 been available on GR-LYCHEE ...

For supporting to CMSIS5/RTX5, I added the start-up processing of 3 toolchains (ARMCC, GCC_ARM, IAR) and the register definition of RZ/A1LU specific.
In addition, I added the linker script files to implement the dynamic HEAP the same as GR-PEACH(RZ/A1H).

TomoYamanaka committed on 15 Jan 2018