STM32L1: build error with STM32L151xB MCU

add RTC from HSE to target STM32F1

Add RTC clock source selection to targets.json

Add HSE support to STM32 RTC

STM32WL : ADDING STM32 SUPPORT ...

Add code concerning all STM32 platforms

STM32H7: define RCC_LSE_BYPASS to allow using PC_15 as gpio

STM: change rtc irq handler name ...

Fix for the error caused by lto on armc6 compiler:

L6137E: Symbol RTC_IRQHandler was not preserved by the LTO codegen but is needed by the image.

lto optimization cause that local symbol RTC_IRQHandler(from rtc_api.c)
somehow interferes with global symbol RTC_IRQHandler (from startup_stm32f070xb.S)

Changing local RTC_IRQHandler to _RTC_IRQHandler fixes problem

STM32L5 : update generic STM files for L5

TARGET_STM: Remove timeout on HSEM. ...

With tickless mechanism hsem can be used for quite a long time
(time to set up PLL clock).
Also, if hsem is held to long, then this is not the current core which is faulty,
but probably the other (the one which hold the HSEM)

DISCO_H747I Dualcore support ...

Add 2 targets for DISCO_H747I dualcore:
* DISCO_H747I      -> for CM7 core
* DISCO_H747I_CM4  -> for CM4 core

Current restrictions:
* TICKLESS deactivated
* DeepSleep not supported (DeepSleep wrapped to sleep)

Warning: use of the same IP (example I2C1) by both core at the same time is not prevented,
but is strongly not recommended.
Some Hardware Semaphore are use for common IP, to manage concurrent access by both cores: Flash, GPIO, RCC.

Warning: Drag and drop of binary to DISCO_H747I will flash CM7.
         In order to flash CM4, one can use STM32 CubeProgrammer tool.

STM32WB : LSI clock selection when LSE is not available

Revert "STM32 RTC : skip rtc_write if possible" ...

`rtc_write` must start the RTC. `time()` uses `rtc_write(0)` to start
the RTC if it is not already enabled, but this check made that not
work.

There's no point trying to optimise this case in a HAL - if we wanted
`set_time()` to protect against users making pointless adjustments, the
implementation should be there. But even then, you might want different
levels of hysteresis depending on application, so it's probably best
left to applications.

This reverts commit 9da5e48.

Merge pull request #8777 from jeromecoutant/PR_LP_RTC ...

STM32 LPTICKER with RTC : better sleep time

STM32 RTC update for easy maintenance

STM32 LPTICKER with RTC : optimise sleep duration

STM32 RTC : skip rtc_write if possible

Merge pull request #8213 from jeromecoutant/PR_RTC_F1 ...

STM32F1 RTC : save values in register

Merge pull request #8286 from jeromecoutant/PR_RTCWRITE ...

STM32 RTC : write RTC time while LPTICKER is enabled

Merge pull request #8242 from jeromecoutant/PR_STM32_LPTICKER ...

STM32 LPTICKER : Fix tickless and LPTICKER_DELAY_TICKS

STM32 RTC : write RTC time while LPTICKER is enabled ...

This fix avoid a long waiting loop in rtc_write function,
  which was not acceptable in TICKLESS context.

Implementation comments added.

Global variable name has been updated for easier maintenance:
- LPTICKER_counter is the U32 continuous tick counter
- LPTICKER_RTC_time is the RTC time used to get the time difference
   between rtc_read_lp() calls

STM32 LPTICKER with RTC : Fix tickless and lp wrapper ...

When both tickless and LPTICKER_DELAY_TICKS are enabled some ST
devices randomly get stuck sleeping forever. This is because the
wake up time passed to the rtc is ignored if the previous match is
about to occur. This causes the device to get stuck in sleep.

This patch prevents matches from getting dropped by the rtc by
deactivating the rtc wake up timer before setting a new value.

Events leading up to this failure for the RTC:

-1st call to lp_ticker_set_interrupt
-delay until ticker interrupt is about to fire
-2nd call to lp_ticker_set_interrupt
-interrupt for 1st call fires and match time for 2nd call is dropped
-LowPowerTickerWrapper gets ticker interrupt but treats it as a
 spurious interrupt and drops it since it comes in too early
-device enters sleep without a wakeup source and locks up

STM32F1 RTC : save values in register ...

Date is managed only by SW
  within CUBE functions HAL_RTC_GetDate and HAL_RTC_SetDate.
They are then replaced by functions that saved counters in HW registers.
RTC_ReadTimeCounter and RTC_WriteTimeCounter are then added to the ST API.

STM32 RTC : remove not necessary macro ...

__HAL_RCC_RTC_CLKPRESCALER is called in __HAL_RCC_RTC_CONFIG

STM32 RTC with LSI : stop reset registers during init

Merge pull request #7790 from jeromecoutant/PR_LPTICKER_RTC ...

STM32 LPTICKER : RTC wake up timer is reset before setting a new one

STM32 RTC : remove compilation warning with unused variable

STM32 : Sunday value is different for STM32F1

STM32 RTC : bypass shadow registers ...

- RTC_SSR for the subseconds
- RTC_TR for the time
- RTC_DR for the date

These registers were accessed through shadow registers which are synchronized with PCLK1 (APB1 clock).
They are now accessed directly in order to avoid waiting for the synchronization duration.

TARGET_STM astyle

STM32 LPTICKER update for targets supporting RTC