Newer
Older
arm-trusted-firmware / plat / mediatek / mt6795 / drivers / timer / mt_cpuxgpt.h
@Leon Chen Leon Chen on 12 Sep 2016 2 KB Support for Mediatek MT6795 SoC
/*
 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *
 * Redistributions of source code must retain the above copyright notice, this
 * list of conditions and the following disclaimer.
 *
 * Redistributions in binary form must reproduce the above copyright notice,
 * this list of conditions and the following disclaimer in the documentation
 * and/or other materials provided with the distribution.
 *
 * Neither the name of ARM nor the names of its contributors may be used
 * to endorse or promote products derived from this software without specific
 * prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef __MT_CPUXGPT_H__
#define __MT_CPUXGPT_H__

/* REG */
#define INDEX_CTL_REG       0x000
#define INDEX_STA_REG       0x004
#define INDEX_CNT_L_INIT    0x008
#define INDEX_CNT_H_INIT    0x00C

/* CTL_REG SET */
#define EN_CPUXGPT          0x01
#define EN_AHLT_DEBUG       0x02
#define CLK_DIV1            (0x1 << 8)
#define CLK_DIV2            (0x2 << 8)
#define CLK_DIV4            (0x4 << 8)
#define CLK_DIV_MASK        (~(0x7<<8))

void generic_timer_backup(void);
void sched_clock_init(uint64_t normal_base, uint64_t atf_base);
uint64_t sched_clock(void);

#endif /* __MT_CPUXGPT_H__ */