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plat/intel: Fix SMPLSEL for MMC
MMC sample select needs to be set properly so that DWMMC clock can be
driven to 50Mhz

Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com>
Change-Id: I4a1dde4f6a1e78a36940c57a7a5b162be0bd443a
WIP_v2.3-LS master v2.2-LS v2.4-LS v2.3-rc2 v2.3-rc1 v2.3-rc0 v2.3 v2.2-rc2 v2.2-rc1 v2.2-rc0 v2.2
1 parent 2cbeee4 commit 0943ea379f0380c0e95a606320768d63cb55b566
@Tien Hock, Loh Tien Hock, Loh authored on 9 Jul 2019
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plat/intel/soc/stratix10/include/s10_system_manager.h
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plat/intel/soc/stratix10/soc/s10_system_manager.c