Workaround for Neoverse N1 erratum 1262888
Neoverse N1 erratum 1262888 is a Cat B erratum [1], present in older revisions of the Neoverse N1 processor core. The workaround is to set a bit in the implementation defined CPUECTLR_EL1 system register, which disables the MMU hardware prefetcher. [1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdoc-466751330-10325/index.html Change-Id: Ib733d748e32a7ea6a2783f3d5a9c5e13eee01105 Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com> |
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docs/design/cpu-specific-build-macros.rst |
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include/lib/cpus/aarch64/neoverse_n1.h |
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lib/cpus/aarch64/neoverse_n1.S |
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lib/cpus/cpu-ops.mk |
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