Workaround for Neoverse N1 erratum 1257314
Neoverse N1 erratum 1257314 is a Cat B erratum [1], present in older revisions of the Neoverse N1 processor core. The workaround is to set a bit in the implementation defined CPUACTLR3_EL1 system register, which prevents parallel execution of divide and square root instructions. [1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdoc-466751330-10325/index.html Change-Id: I54f0f40ff9043efee40d51e796b92ed85b394cbb Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com> |
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docs/design/cpu-specific-build-macros.rst |
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include/lib/cpus/aarch64/neoverse_n1.h |
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lib/cpus/aarch64/neoverse_n1.S |
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lib/cpus/cpu-ops.mk |
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