Update intel platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit. Change-Id: I4c7a315cb18b3bbe623e7a7a998d2dac869638a7 Signed-off-by: Justin Chadwell <justin.chadwell@arm.com> |
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plat/intel/soc/common/drivers/qspi/cadence_qspi.h |
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plat/intel/soc/stratix10/include/s10_mailbox.h |
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